Home
last modified time | relevance | path

Searched refs:UOps (Results 1 – 20 of 20) sorted by relevance

/openbsd-src/gnu/llvm/llvm/include/llvm/MCA/
H A DHWEventListener.h76 unsigned UOps) in HWInstructionDispatchedEvent() argument
78 UsedPhysRegs(Regs), MicroOpcodes(UOps) {} in HWInstructionDispatchedEvent()
/openbsd-src/gnu/llvm/llvm/lib/MCA/Stages/
H A DDispatchStage.cpp40 unsigned UOps) const { in notifyInstructionDispatched()
43 HWInstructionDispatchedEvent(IR, UsedRegs, UOps)); in notifyInstructionDispatched()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DTargetSchedule.cpp94 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps() local
95 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, *MI); in getNumMicroOps()
H A DTargetInstrInfo.cpp1259 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps() local
1260 if (UOps >= 0) in getNumMicroOps()
1261 return UOps; in getNumMicroOps()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86ScheduleZnver3.td402 int Lat = 1, list<int> Res = [], int UOps = 1> {
406 let NumMicroOps = UOps;
412 list<int> Res, int UOps, int LoadLat, int LoadUOps,
414 defm : __zn3WriteRes<SchedRW, ExePorts, Lat, Res, UOps>;
425 !add(UOps, LoadUOps)>;
431 list<int> Res = [], int UOps = 1> {
432 defm : __zn3WriteRes<SchedRW, ExePorts, Lat, Res, UOps>;
437 list<int> Res = [], int UOps = 1> {
438 defm : __zn3WriteRes<SchedRW, ExePorts, Lat, Res, UOps>;
443 list<int> Res = [], int UOps = 1> {
[all …]
H A DX86ScheduleZnver4.td401 int Lat = 1, list<int> Res = [], int UOps = 1> {
405 let NumMicroOps = UOps;
411 list<int> Res, int UOps, int LoadLat, int LoadUOps,
413 defm : __Zn4WriteRes<SchedRW, ExePorts, Lat, Res, UOps>;
424 !add(UOps, LoadUOps)>;
430 list<int> Res = [], int UOps = 1> {
431 defm : __Zn4WriteRes<SchedRW, ExePorts, Lat, Res, UOps>;
436 list<int> Res = [], int UOps = 1> {
437 defm : __Zn4WriteRes<SchedRW, ExePorts, Lat, Res, UOps>;
442 list<int> Res = [], int UOps = 1> {
[all …]
H A DX86ScheduleBdVer2.td192 list<int> Res = [], int UOps = 1> {
196 let NumMicroOps = UOps;
202 list<int> Res, int UOps,
204 defm : PdWriteRes<SchedRW, ExePorts, Lat, Res, UOps>;
215 !add(UOps, LoadUOps)>;
220 list<int> Res = [], int UOps = 1,
222 defm : __pdWriteResPair<SchedRW, ExePorts, Lat, Res, UOps,
228 list<int> Res = [], int UOps = 1,
230 defm : __pdWriteResPair<SchedRW, ExePorts, Lat, Res, UOps,
236 list<int> Res = [], int UOps = 2,
[all …]
H A DX86ScheduleBtVer2.td123 int Lat, list<int> Res = [], int UOps = 1,
129 let NumMicroOps = UOps;
137 let NumMicroOps = !add(UOps, LoadUOps);
143 int Lat, list<int> Res = [], int UOps = 1,
149 let NumMicroOps = UOps;
157 let NumMicroOps = !add(UOps, LoadUOps);
163 int Lat, list<int> Res = [2], int UOps = 2,
169 let NumMicroOps = UOps;
177 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86ScheduleSLM.td64 int Lat, list<int> Res = [1], int UOps = 1,
70 let NumMicroOps = UOps;
78 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86ScheduleZnver1.td134 int Lat, list<int> Res = [], int UOps = 1,
140 let NumMicroOps = UOps;
148 let NumMicroOps = !add(UOps, LoadUOps);
155 int Lat, list<int> Res = [], int UOps = 1,
161 let NumMicroOps = UOps;
169 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86ScheduleZnver2.td133 int Lat, list<int> Res = [], int UOps = 1,
139 let NumMicroOps = UOps;
147 let NumMicroOps = !add(UOps, LoadUOps);
154 int Lat, list<int> Res = [], int UOps = 1,
160 let NumMicroOps = UOps;
168 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86SchedSandyBridge.td88 int Lat, list<int> Res = [1], int UOps = 1,
94 let NumMicroOps = UOps;
102 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86SchedSkylakeClient.td92 int Lat, list<int> Res = [1], int UOps = 1,
98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86SchedBroadwell.td93 int Lat, list<int> Res = [1], int UOps = 1,
99 let NumMicroOps = UOps;
107 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86Schedule.td33 int Lat, list<int> Res, int UOps> {
37 let NumMicroOps = UOps;
H A DX86SchedHaswell.td98 int Lat, list<int> Res = [1], int UOps = 1,
104 let NumMicroOps = UOps;
112 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86SchedAlderlakeP.td101 int Lat, list<int> Res = [1], int UOps = 1,
107 let NumMicroOps = UOps;
115 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86SchedSkylakeServer.td92 int Lat, list<int> Res = [1], int UOps = 1,
98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, LoadUOps);
H A DX86SchedIceLake.td100 int Lat, list<int> Res = [1], int UOps = 1,
106 let NumMicroOps = UOps;
114 let NumMicroOps = !add(UOps, LoadUOps);
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3478 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt() local
3479 assert(UOps >= 0 && "bad # UOps"); in getNumMicroOpsSwiftLdSt()
3480 return UOps; in getNumMicroOpsSwiftLdSt()
3738 unsigned UOps = 1 + NumRegs; // 1 for address computation. in getNumMicroOpsSingleIssuePlusExtras() local
3764 ++UOps; // One for base register writeback. in getNumMicroOpsSingleIssuePlusExtras()
3769 UOps += 2; // One for base reg wb, one for write to pc. in getNumMicroOpsSingleIssuePlusExtras()
3772 return UOps; in getNumMicroOpsSingleIssuePlusExtras()
3868 unsigned UOps = (NumRegs / 2); in getNumMicroOps() local
3870 ++UOps; in getNumMicroOps()
3871 return UOps; in getNumMicroOps()
[all …]