| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyMemIntrinsicResults.cpp | 85 unsigned FromReg, unsigned ToReg, in replaceDominatedUses() argument
92 LiveInterval *ToLI = &LIS.getInterval(ToReg); in replaceDominatedUses()
121 O.setReg(ToReg); in replaceDominatedUses()
169 Register ToReg = MI.getOperand(0).getReg(); in optimizeCall() local
170 if (MRI.getRegClass(FromReg) != MRI.getRegClass(ToReg)) in optimizeCall()
173 return replaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); in optimizeCall()
|
| /openbsd-src/gnu/llvm/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 78 return I->ToReg; in getDwarfRegNum()
91 return I->ToReg; in getLLVMRegNum()
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 121 bool isRevCopyChain(Register FromReg, Register ToReg, int Maxlen);
225 bool TwoAddressInstructionPass::isRevCopyChain(Register FromReg, Register ToReg, in isRevCopyChain() argument
235 if (TmpReg == ToReg) in isRevCopyChain()
455 Register ToReg = SI.second; in removeMapRegEntry() local
456 if (ToReg.isVirtual()) in removeMapRegEntry()
461 if (TRI->regsOverlap(ToReg, Reg)) in removeMapRegEntry()
463 } else if (MO.clobbersPhysReg(ToReg)) in removeMapRegEntry()
749 unsigned ToReg = VirtRegPairs.back(); in scanUses() local
753 bool isNew = DstRegMap.insert(std::make_pair(FromReg, ToReg)).second; in scanUses()
755 assert(DstRegMap[FromReg] == ToReg &&"Can't map to two dst registers!"); in scanUses()
[all …]
|
| H A D | MachineRegisterInfo.cpp | 380 void MachineRegisterInfo::replaceRegWith(Register FromReg, Register ToReg) { in replaceRegWith() argument
381 assert(FromReg != ToReg && "Cannot replace a reg with itself"); in replaceRegWith()
387 if (ToReg.isPhysical()) { in replaceRegWith()
388 O.substPhysReg(ToReg, *TRI); in replaceRegWith()
390 O.setReg(ToReg); in replaceRegWith()
|
| H A D | SplitKit.h | 426 SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
430 SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
|
| H A D | SplitKit.cpp | 517 SlotIndex SplitEditor::buildSingleSubRegCopy(Register FromReg, Register ToReg, in buildSingleSubRegCopy() argument
523 .addReg(ToReg, RegState::Define | getUndefRegState(FirstCopy) in buildSingleSubRegCopy()
536 SlotIndex SplitEditor::buildCopy(Register FromReg, Register ToReg, in buildCopy() argument
544 BuildMI(MBB, InsertBefore, DebugLoc(), Desc, ToReg).addReg(FromReg); in buildCopy()
556 assert(RC == MRI.getRegClass(ToReg) && "Should have same reg class"); in buildCopy()
566 Def = buildSingleSubRegCopy(FromReg, ToReg, MBB, InsertBefore, BestIdx, in buildCopy()
|
| H A D | MachineInstr.cpp | 1217 void MachineInstr::substituteRegister(Register FromReg, Register ToReg, in substituteRegister() argument
1220 if (ToReg.isPhysical()) { in substituteRegister()
1222 ToReg = RegInfo.getSubReg(ToReg, SubIdx); in substituteRegister()
1226 MO.substPhysReg(ToReg, RegInfo); in substituteRegister()
1232 MO.substVirtReg(ToReg, SubIdx, RegInfo); in substituteRegister()
|
| H A D | ModuloSchedule.cpp | 340 static void replaceRegUsesAfterLoop(unsigned FromReg, unsigned ToReg, in replaceRegUsesAfterLoop() argument
347 O.setReg(ToReg); in replaceRegUsesAfterLoop()
348 if (!LIS.hasInterval(ToReg)) in replaceRegUsesAfterLoop()
349 LIS.createEmptyInterval(ToReg); in replaceRegUsesAfterLoop()
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 153 void replaceRegWith(MachineRegisterInfo &MRI, Register FromReg, Register ToReg) const;
158 Register ToReg) const;
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 143 unsigned ToReg; member
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1880 void replaceAllRegUsesWith(Register FromReg, Register ToReg);
3127 Register ToReg) { in replaceAllRegUsesWith() argument
3129 assert(ToReg.isVirtual()); in replaceAllRegUsesWith()
3132 O.setReg(ToReg); in replaceAllRegUsesWith()
|
| H A D | HexagonISelLowering.cpp | 2802 SDValue ToReg = getInstr(Hexagon::C2_tfrpr, dl, MVT::i32, {VecV}, DAG); in insertVectorPred() local
2807 DAG.getNode(HexagonISD::INSERT, dl, MVT::i32, {ToReg, Ext, Width, Idx}); in insertVectorPred()
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 625 void replaceRegWith(Register FromReg, Register ToReg);
|
| H A D | MachineInstr.h | 1602 void substituteRegister(Register FromReg, Register ToReg, unsigned SubIdx,
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 160 Register ToReg) const { in replaceRegWith()
163 if (MRI.constrainRegAttrs(ToReg, FromReg)) in replaceRegWith()
164 MRI.replaceRegWith(FromReg, ToReg); in replaceRegWith()
166 Builder.buildCopy(ToReg, FromReg); in replaceRegWith()
173 Register ToReg) const { in replaceRegOpWith()
177 FromRegOp.setReg(ToReg); in replaceRegOpWith()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 5494 SDValue ToReg = DAG.getCopyToReg(Chain, SL, SGPR01, in lowerTrapHsaQueuePtr() local
5499 ToReg, in lowerTrapHsaQueuePtr()
5502 ToReg.getValue(1) in lowerTrapHsaQueuePtr()
|