Searched refs:TmpOffsetVGPR (Results 1 – 1 of 1) sorted by relevance
1356 Register TmpOffsetVGPR; in buildSpillLoadStore() local1382 .addReg(TmpOffsetVGPR); in buildSpillLoadStore()1385 assert(TmpOffsetVGPR); in buildSpillLoadStore()1424 TmpOffsetVGPR = RS->scavengeRegisterBackwards(AMDGPU::VGPR_32RegClass, MI, false, 0); in buildSpillLoadStore()1429 TmpOffsetVGPR = Reg; in buildSpillLoadStore()1435 assert(TmpOffsetVGPR); in buildSpillLoadStore()1466 MaterializeVOffset(ScratchOffsetReg, TmpOffsetVGPR, Offset); in buildSpillLoadStore()1508 if (UseVGPROffset && TmpOffsetVGPR == TmpIntermediateVGPR) { in buildSpillLoadStore()1515 MaterializeVOffset(ScratchOffsetReg, TmpOffsetVGPR, MaterializedOffset); in buildSpillLoadStore()1609 if (!TmpOffsetVGPR) { in buildSpillLoadStore()[all …]