Searched refs:SubHi (Results 1 – 3 of 3) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitSimplify.cpp | 471 unsigned SubHi = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_hi); in parseRegSequence() local 472 assert((Sub1 == SubLo && Sub2 == SubHi) || (Sub1 == SubHi && Sub2 == SubLo)); in parseRegSequence() 473 if (Sub1 == SubLo && Sub2 == SubHi) { in parseRegSequence() 478 if (Sub1 == SubHi && Sub2 == SubLo) { in parseRegSequence() 1658 unsigned SubHi = HRI.getHexagonSubRegIndex(*FRC, Hexagon::ps_sub_hi); in processBlock() local 1660 BitTracker::RegisterRef TH = { R, SubHi }; in processBlock() 1669 .addImm(SubHi); in processBlock() 1723 unsigned SubHi = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi); in propagateRegCopy() local 1725 Changed |= HBS::replaceSubWithSub(RD.Reg, SubHi, SH.Reg, SH.Sub, MRI); in propagateRegCopy() 1733 unsigned SubHi = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi); in propagateRegCopy() local [all …]
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| H A D | HexagonConstPropagation.cpp | 1955 unsigned SubHi = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_hi); in evaluate() local 1956 if (Sub1 != SubLo && Sub1 != SubHi) in evaluate() 1958 if (Sub2 != SubLo && Sub2 != SubHi) in evaluate()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 41388 if (SDValue SubHi = FindSubVector128((Imm & 0xF0) >> 4)) { in combineTargetShuffle() local 41391 SubHi = DAG.getBitcast(SubVT, SubHi); in combineTargetShuffle() 41392 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, SubLo, SubHi); in combineTargetShuffle()
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