Searched refs:SmallVT (Results 1 – 7 of 7) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 582 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits); in ShrinkDemandedOp() local
583 if (TLI.isTruncateFree(Op.getValueType(), SmallVT) && in ShrinkDemandedOp()
584 TLI.isZExtFree(SmallVT, Op.getValueType())) { in ShrinkDemandedOp()
587 Op.getOpcode(), dl, SmallVT, in ShrinkDemandedOp()
588 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), in ShrinkDemandedOp()
589 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1))); in ShrinkDemandedOp()
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| H A D | LegalizeIntegerTypes.cpp | 1511 EVT SmallVT = LHS.getValueType(); in PromoteIntRes_XMULO() local
1533 unsigned Shift = SmallVT.getScalarSizeInBits(); in PromoteIntRes_XMULO()
1543 Mul, DAG.getValueType(SmallVT)); in PromoteIntRes_XMULO()
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| H A D | DAGCombiner.cpp | 9867 EVT SmallVT = N0.getOperand(0).getValueType(); in visitSRL() local
9868 unsigned BitSize = SmallVT.getScalarSizeInBits(); in visitSRL()
9872 if (!LegalTypes || TLI.isTypeDesirableForOp(ISD::SRL, SmallVT)) { in visitSRL()
9875 SDValue SmallShift = DAG.getNode(ISD::SRL, DL0, SmallVT, in visitSRL()
9878 getShiftAmountTy(SmallVT))); in visitSRL()
22994 EVT SmallVT = V.getOperand(1).getValueType(); in visitEXTRACT_SUBVECTOR() local
22995 if (!NVT.bitsEq(SmallVT)) in visitEXTRACT_SUBVECTOR()
23004 if (InsIdx * SmallVT.getScalarSizeInBits() == in visitEXTRACT_SUBVECTOR()
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| H A D | SelectionDAGBuilder.cpp | 9481 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), Bits); in lowerRangeToAssertZExt() local
9486 DAG.getValueType(SmallVT)); in lowerRangeToAssertZExt()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4208 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), WidthVal); in PerformDAGCombine() local
4217 DAG.getValueType(SmallVT)); in PerformDAGCombine()
4220 return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT); in PerformDAGCombine()
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| H A D | SIISelLowering.cpp | 6832 EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), llvm::bit_width(MaxID)); in lowerWorkitemID() local
6834 DAG.getValueType(SmallVT)); in lowerWorkitemID()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 767 for (auto SmallVT : SmallerVTs) { in RISCVTargetLowering() local
768 setTruncStoreAction(VT, SmallVT, Expand); in RISCVTargetLowering()
769 setLoadExtAction(ISD::EXTLOAD, VT, SmallVT, Expand); in RISCVTargetLowering()
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