| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMatInt.cpp | 29 if (Highest12 != 0 && SignExtend64<52>(Val) == 0) { in generateInstSeq() 30 Insts.push_back(Inst(LoongArch::LU52I_D, SignExtend64<12>(Highest12))); in generateInstSeq() 37 Insts.push_back(Inst(LoongArch::ADDI_W, SignExtend64<12>(Lo12))); in generateInstSeq() 39 Insts.push_back(Inst(LoongArch::LU12I_W, SignExtend64<20>(Hi20))); in generateInstSeq() 45 Insts.push_back(Inst(LoongArch::LU32I_D, SignExtend64<20>(Higher20))); in generateInstSeq() 48 Insts.push_back(Inst(LoongArch::LU52I_D, SignExtend64<12>(Highest12))); in generateInstSeq()
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| /openbsd-src/gnu/llvm/lld/ELF/Arch/ |
| H A D | Mips.cpp | 391 return SignExtend64<32>(read32(buf)); in getImplicitAddend() 396 return SignExtend64<28>(read32(buf) << 2); in getImplicitAddend() 402 return SignExtend64<16>(read32(buf)) << 16; in getImplicitAddend() 416 return SignExtend64<16>(read32(buf)); in getImplicitAddend() 419 return SignExtend64<16>(readShuffle<e>(buf)) << 16; in getImplicitAddend() 430 return SignExtend64<16>(readShuffle<e>(buf)); in getImplicitAddend() 432 return SignExtend64<9>(readShuffle<e>(buf) << 2); in getImplicitAddend() 434 return SignExtend64<18>(read32(buf) << 2); in getImplicitAddend() 436 return SignExtend64<21>(read32(buf) << 2); in getImplicitAddend() 438 return SignExtend64<23>(read32(buf) << 2); in getImplicitAddend() [all …]
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| H A D | ARM.cpp | 782 return SignExtend64<32>(read32le(buf)); in getImplicitAddend() 784 return SignExtend64<31>(read32le(buf)); in getImplicitAddend() 789 return SignExtend64<26>(read32le(buf) << 2); in getImplicitAddend() 791 return SignExtend64<9>(read16le(buf) << 1); in getImplicitAddend() 793 return SignExtend64<12>(read16le(buf) << 1); in getImplicitAddend() 798 return SignExtend64<20>(((hi & 0x0400) << 10) | // S in getImplicitAddend() 810 return SignExtend64<22>(((hi & 0x7ff) << 12) | // imm11 in getImplicitAddend() 820 return SignExtend64<24>(((hi & 0x0400) << 14) | // S in getImplicitAddend() 835 return SignExtend64<16>(((val & 0x000f0000) >> 4) | (val & 0x00fff)); in getImplicitAddend() 846 return SignExtend64<16>(((hi & 0x000f) << 12) | // imm4 in getImplicitAddend()
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| H A D | X86.cpp | 240 return SignExtend64<8>(*buf); in getImplicitAddend() 243 return SignExtend64<16>(read16le(buf)); in getImplicitAddend() 269 return SignExtend64<32>(read32le(buf)); in getImplicitAddend() 271 return SignExtend64<32>(read32le(buf + 4)); in getImplicitAddend() 490 const uint64_t val = SignExtend64( in relocateAlloc()
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| H A D | AArch64.cpp | 216 return SignExtend64<32>(read32(buf)); in getImplicitAddend() 724 if (val != llvm::SignExtend64(val, 33)) in tryRelaxAdrpLdr() 738 SignExtend64(getAArch64Page(sym.getVA()) - in tryRelaxAdrpLdr() 741 target->relocate(buf + addRel.offset, addRel, SignExtend64(sym.getVA(), 64)); in tryRelaxAdrpLdr()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 109 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Imm << 2))); in decodeCallOperand() 116 Inst.addOperand(MCOperand::createImm(SignExtend64<18>(Imm))); in decodeJumpOperand() 128 if (!tryAddingSymbolicOperand(SignExtend64<12>(Imm) + 4 + Address, true, in decodeBranchOperand() 130 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeBranchOperand() 134 if (!tryAddingSymbolicOperand(SignExtend64<8>(Imm) + 4 + Address, true, in decodeBranchOperand() 136 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeBranchOperand() 146 SignExtend64<17>((Imm << 2) + 0x40000 + (Address & 0x3)))); in decodeL32ROperand() 153 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeImm8Operand() 161 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 8))); in decodeImm8_sh8Operand() 168 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeImm12Operand()
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| /openbsd-src/gnu/llvm/lldb/source/Plugins/Instruction/LoongArch/ |
| H A D | EmulateInstructionLoongArch.cpp | 284 uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2); in EmulateBEQZ64() 304 uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2); in EmulateBNEZ64() 325 uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2); in EmulateBCEQZ64() 347 uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2); in EmulateBCNEZ64() 370 uint64_t next_pc = rj_val + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2); in EmulateJIRL64() 382 uint64_t next_pc = pc + llvm::SignExtend64<28>(offs26 << 2); in EmulateB64() 398 uint64_t next_pc = pc + llvm::SignExtend64<28>(offs26 << 2); in EmulateBL64() 419 uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2); in EmulateBEQ64() 442 uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2); in EmulateBNE64() 467 uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2); in EmulateBLT64() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCExpr.cpp | 188 AbsVal = SignExtend64<16>(AbsVal); in evaluateAsRelocatableImpl() 192 AbsVal = SignExtend64<16>((AbsVal + 0x8000) >> 16); in evaluateAsRelocatableImpl() 195 AbsVal = SignExtend64<16>((AbsVal + 0x80008000LL) >> 32); in evaluateAsRelocatableImpl() 198 AbsVal = SignExtend64<16>((AbsVal + 0x800080008000LL) >> 48); in evaluateAsRelocatableImpl()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 252 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 305 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands() 327 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands() 340 const int64_t Disp = SignExtend64<7>((Imm & 0x3F) + 64) * 8; in decodeMemRIHashOperands() 360 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 4))); in decodeMemRIX16Operands() 375 Inst.addOperand(MCOperand::createImm(SignExtend64<34>(Disp))); in decodeMemRI34PCRelOperands() 389 Inst.addOperand(MCOperand::createImm(SignExtend64<34>(Disp))); in decodeMemRI34Operands()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCMacroFusion.cpp | 89 Imm = SignExtend64(Imm, ExtendFrom); in matchingImmOps() 211 return SignExtend64(SI.getImm(), 16) >= 0; in checkOpConstraints() 222 int64_t ExtendedSI = SignExtend64(SI.getImm(), 16); in checkOpConstraints()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVMergeBaseOffset.cpp | 201 int64_t Offset = SignExtend64<32>(LuiImmOp.getImm() << 12); in foldLargeOffset() 205 Offset = SignExtend64<32>(Offset); in foldLargeOffset() 219 int64_t Offset = SignExtend64<32>(OffsetTail.getOperand(1).getImm() << 12); in foldLargeOffset() 406 NewOffset = SignExtend64<32>(NewOffset); in foldIntoMemoryOps()
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| H A D | RISCVCodeGenPrepare.cpp | 135 if (!isUInt<32>(C) || isInt<12>(C) || !isInt<12>(SignExtend64<32>(C))) in visitAnd() 146 C = SignExtend64<32>(C); in visitAnd()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 619 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeAddiGroupBranch() 656 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP35GroupBranchMMR6() 663 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP35GroupBranchMMR6() 668 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP35GroupBranchMMR6() 692 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeDaddiGroupBranch() 729 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP37GroupBranchMMR6() 736 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP37GroupBranchMMR6() 741 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP37GroupBranchMMR6() 762 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP65GroupBranchMMR6() 801 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP75GroupBranchMMR6() [all …]
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| /openbsd-src/gnu/llvm/lldb/source/Plugins/Instruction/ARM64/ |
| H A D | EmulateInstructionARM64.cpp | 766 idx = LSL(llvm::SignExtend64<7>(imm7), scale); in EmulateLDPSTP() 935 offset = llvm::SignExtend64<9>(Bits32(opcode, 20, 12)); in EmulateLDRSTRImm() 940 offset = llvm::SignExtend64<9>(Bits32(opcode, 20, 12)); in EmulateLDRSTRImm() 1067 int64_t offset = llvm::SignExtend64<28>(Bits32(opcode, 25, 0) << 2); in EmulateB() 1104 int64_t offset = llvm::SignExtend64<21>(Bits32(opcode, 23, 5) << 2); in EmulateBcond() 1132 int32_t offset = llvm::SignExtend64<21>(Bits32(opcode, 23, 5) << 2); in EmulateCBZ() 1168 int64_t offset = llvm::SignExtend64<16>(Bits32(opcode, 18, 5) << 2); in EmulateTBZ()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 69 int64_t Lo12 = SignExtend64<12>(Val); in generateInstSeqImpl() 106 int64_t Lo12 = SignExtend64<12>(Val); in generateInstSeqImpl() 327 int64_t Lo12 = SignExtend64<12>(Val); in generateInstSeq()
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| /openbsd-src/gnu/llvm/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
| H A D | RuntimeDyldMachOAArch64.h | 98 Addend = SignExtend64(Addend, 28); in decodeAddend() 111 Addend = SignExtend64(Addend, 33); in decodeAddend() 297 ExplicitAddend = SignExtend64(RawAddend, 24); in processRelocationRef() 500 SignExtend64(readBytesUnaligned(LocalAddress, NumBytes), NumBytes * 8); in processSubtractRelocation()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 181 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 262 uint64_t Value = SignExtend64<N>(Imm) * 2 + Address; in decodePCDBLOperand() 317 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand() 340 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
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| /openbsd-src/gnu/llvm/lld/ELF/ |
| H A D | Target.h | 233 if (v != llvm::SignExtend64(v, n)) in checkInt() 248 if (v != (uint64_t)llvm::SignExtend64(v, n) && (v >> n) != 0) in checkIntUInt()
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| H A D | Target.cpp | 162 const uint64_t val = SignExtend64( in relocateAlloc()
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| /openbsd-src/gnu/llvm/lld/MachO/ |
| H A D | Relocations.h | 92 if (v != llvm::SignExtend64(v, bits)) in checkInt()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 306 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 327 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm << 1))); in decodeSImmOperandAndLsl1() 336 Imm = (SignExtend64<6>(Imm) & 0xfffff); in decodeCLUIImmOperand()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | Mips16RegisterInfo.cpp | 138 Offset = SignExtend64<16>(NewImm); in eliminateFI()
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| H A D | MipsAnalyzeImmediate.cpp | 97 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi()
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| /openbsd-src/gnu/llvm/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDataExtractor.cpp | 111 Result = SignExtend64<32>(getRelocatedValue(4, Offset)); in getEncodedPointer()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 119 Inst.addOperand(MCOperand::createImm(SignExtend64<N + S>(Imm << S))); in decodeSImmOperand()
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