Searched refs:SignExt (Results 1 – 5 of 5) sorted by relevance
| /openbsd-src/gnu/llvm/lldb/source/Plugins/Instruction/RISCV/ |
| H A D | EmulateInstructionRISCV.cpp | 57 constexpr int32_t SignExt(uint32_t imm) { return int32_t(imm); } in SignExt() function
222 return rs1 + uint64_t(SignExt(inst.imm)); in LoadStoreAddr()
666 bool operator()(LUI inst) { return inst.rd.Write(m_emu, SignExt(inst.imm)); } in operator ()()
671 SignExt(inst.imm) + pc); in operator ()()
679 m_emu.WritePC(SignExt(inst.imm) + pc); in operator ()()
688 m_emu.WritePC((SignExt(inst.imm) + rs1) & in operator ()()
700 return m_emu.WritePC(SignExt(inst.imm) + pc); in operator ()()
727 m_emu, rs1 + int64_t(SignExt(inst.imm))); in operator ()()
735 m_emu, rs1 < int64_t(SignExt(inst.imm))); in operator ()()
743 m_emu, rs1 < uint64_t(SignExt(inst.imm))); in operator ()()
[all …]
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| /openbsd-src/gnu/llvm/clang/include/clang/CodeGen/ |
| H A D | CGFunctionInfo.h | 118 bool SignExt : 1; // isExtend() variable
140 SignExt(false) {}
330 return SignExt; in isSignExt()
334 SignExt = SExt; in setSignExt()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyIndVar.cpp | 1265 auto GuessNonIVOperand = [&](bool SignExt) { in cloneArithmeticIVUser() argument
1269 auto GetExtend = [this, SignExt](const SCEV *S, Type *Ty) { in cloneArithmeticIVUser()
1270 if (SignExt) in cloneArithmeticIVUser()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 626 bool SignExt = false; in tryShrinkShlLogicImm() local
629 SignExt = true; in tryShrinkShlLogicImm()
653 if (SignExt && ShAmt >= 32) in tryShrinkShlLogicImm()
665 unsigned ShOpc = SignExt ? RISCV::SLLIW : RISCV::SLLI; in tryShrinkShlLogicImm()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 25945 SDValue SignExt = Curr; in LowerEXTEND_VECTOR_INREG() local
25968 SignExt = DAG.getNode(X86ISD::VSRAI, dl, DestVT, Curr, in LowerEXTEND_VECTOR_INREG()
25976 SignExt = DAG.getVectorShuffle(MVT::v4i32, dl, SignExt, Sign, {0, 4, 1, 5}); in LowerEXTEND_VECTOR_INREG()
25977 SignExt = DAG.getBitcast(VT, SignExt); in LowerEXTEND_VECTOR_INREG()
25980 return SignExt; in LowerEXTEND_VECTOR_INREG()
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