Searched refs:ShiftWidth (Results 1 – 7 of 7) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 149 bool LoongArchDAGToDAGISel::selectShiftMask(SDValue N, unsigned ShiftWidth, in selectShiftMask() argument
159 assert(isPowerOf2_32(ShiftWidth) && "Unexpected max shift amount!"); in selectShiftMask()
160 APInt ShMask(AndMask.getBitWidth(), ShiftWidth - 1); in selectShiftMask()
177 assert(isPowerOf2_32(ShiftWidth) && "Unexpected max shift amount!"); in selectShiftMask()
181 if (lsb == 0 && Log2_32(ShiftWidth) <= msb + 1) { in selectShiftMask()
190 if (Imm != 0 && Imm % ShiftWidth == 0) { in selectShiftMask()
|
| H A D | LoongArchISelDAGToDAG.h | 47 bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.h | 55 bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
|
| H A D | RISCVISelDAGToDAG.cpp | 2065 bool RISCVDAGToDAGISel::selectShiftMask(SDValue N, unsigned ShiftWidth, in selectShiftMask() argument
2077 assert(isPowerOf2_32(ShiftWidth) && "Unexpected max shift amount!"); in selectShiftMask()
2078 APInt ShMask(AndMask.getBitWidth(), ShiftWidth - 1); in selectShiftMask()
2097 if (Imm != 0 && Imm % ShiftWidth == 0) { in selectShiftMask()
2106 if (Imm != 0 && Imm % ShiftWidth == 0) { in selectShiftMask()
2118 if (Imm % ShiftWidth == ShiftWidth - 1) { in selectShiftMask()
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 2390 unsigned ShiftWidth = TypeSize - 1;
2403 auto LHS = m_AShr(m_Value(OpL), m_SpecificInt(ShiftWidth));
2404 auto RHS = m_LShr(m_Neg(m_Value(OpR)), m_SpecificInt(ShiftWidth));
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1303 AArch64_AM::ShiftExtendType ShiftExtendTy, int ShiftWidth,
1313 bool MatchShift = getShiftExtendAmount() == Log2_32(ShiftWidth / 8); in isSVEDataVectorRegWithShiftExtend()
1316 !ShiftWidthAlwaysSame && hasShiftExtendAmount() && ShiftWidth == 8) in isSVEDataVectorRegWithShiftExtend()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1540 auto ShiftWidth = B.buildShl(S32, WidthReg, B.buildConstant(S32, 16)); in applyMappingBFE() local
1545 auto MergedInputs = B.buildOr(S32, ClampOffset, ShiftWidth); in applyMappingBFE()
|