Home
last modified time | relevance | path

Searched refs:ShiftOffset (Results 1 – 4 of 4) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUPostLegalizerCombiner.cpp69 unsigned ShiftOffset; member
262 unsigned ShiftOffset = 8 * Offset; in matchCvtF32UByteN() local
264 ShiftOffset += ShiftAmt; in matchCvtF32UByteN()
266 ShiftOffset -= ShiftAmt; in matchCvtF32UByteN()
269 MatchInfo.ShiftOffset = ShiftOffset; in matchCvtF32UByteN()
270 return ShiftOffset < 32 && ShiftOffset >= 8 && (ShiftOffset % 8) == 0; in matchCvtF32UByteN()
280 unsigned NewOpc = AMDGPU::G_AMDGPU_CVT_F32_UBYTE0 + MatchInfo.ShiftOffset / 8; in applyCvtF32UByteN()
H A DAMDGPURegisterBankInfo.cpp1484 auto ShiftOffset = Signed ? B.buildAShr(S64, SrcReg, OffsetReg) in applyMappingBFE() local
1486 auto UnmergeSOffset = B.buildUnmerge({S32, S32}, ShiftOffset); in applyMappingBFE()
1521 auto SignBit = B.buildShl(S64, ShiftOffset, ExtShift); in applyMappingBFE()
H A DSIISelLowering.cpp11540 unsigned ShiftOffset = 8 * Offset; in performCvtF32UByteNCombine() local
11542 ShiftOffset -= C->getZExtValue(); in performCvtF32UByteNCombine()
11544 ShiftOffset += C->getZExtValue(); in performCvtF32UByteNCombine()
11546 if (ShiftOffset < 32 && (ShiftOffset % 8) == 0) { in performCvtF32UByteNCombine()
11547 return DAG.getNode(AMDGPUISD::CVT_F32_UBYTE0 + ShiftOffset / 8, SL, in performCvtF32UByteNCombine()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp1336 SDValue ShiftOffset = DAG.getConstant(NewBits - OldBits, DL, AmtVT); in PromoteIntRes_FunnelShift() local
1337 Lo = DAG.getNode(ISD::SHL, DL, VT, Lo, ShiftOffset); in PromoteIntRes_FunnelShift()
1342 Amt = DAG.getNode(ISD::ADD, DL, AmtVT, Amt, ShiftOffset); in PromoteIntRes_FunnelShift()