| /openbsd-src/gnu/llvm/llvm/tools/llvm-xray/ |
| H A D | xray-color-helper.cpp | 85 double Scaled[3] = {std::get<0>(Color) / 255.0, std::get<1>(Color) / 255.0, in convertToHSV() local
90 if (Scaled[i] < Scaled[Min]) in convertToHSV()
92 if (Scaled[i] > Scaled[Max]) in convertToHSV()
96 double C = Scaled[Max] - Scaled[Min]; in convertToHSV()
99 (C == 0) ? 0 : (Scaled[(Max + 1) % 3] - Scaled[(Max + 2) % 3]) / C; in convertToHSV()
104 double V = Scaled[Max]; in convertToHSV()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/Transforms/ |
| H A D | Instrumentation.h | 168 uint64_t Scaled = Count / Scale; in scaleBranchCount() local
169 assert(Scaled <= std::numeric_limits<uint32_t>::max() && "overflow 32-bits"); in scaleBranchCount()
170 return Scaled; in scaleBranchCount()
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| /openbsd-src/gnu/llvm/llvm/lib/Analysis/ |
| H A D | BlockFrequencyInfoImpl.cpp | 508 Scaled64 Scaled = BFI.Freqs[Index].Scaled * ScalingFactor; in convertFloatingToInteger() local
509 BFI.Freqs[Index].Integer = std::max(UINT64_C(1), Scaled.toInt<uint64_t>()); in convertFloatingToInteger()
511 << BFI.Freqs[Index].Scaled << ", scaled = " << Scaled in convertFloatingToInteger()
534 : BFI.Freqs[N.Index].Scaled; in unwrapLoop()
545 Freqs[Index].Scaled = Working[Index].Mass.toScaled(); in unwrapLoops()
558 Min = std::min(Min, Freqs[Index].Scaled); in finalizeMetrics()
559 Max = std::max(Max, Freqs[Index].Scaled); in finalizeMetrics()
625 return Freqs[Node.Index].Scaled; in getFloatingBlockFreq()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleV6.td | 108 // Scaled register offset, issues over 2 cycles
121 // Scaled register offset with update, issues over 2 cycles
161 // Scaled register offset, issues over 2 cycles
174 // Scaled register offset with update, issues over 2 cycles
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| H A D | ARMScheduleA8.td | 123 // Scaled register offset, issues over 2 cycles
144 // Scaled register offset with update, issues over 2 cycles
202 // Scaled register offset, issues over 2 cycles
222 // Scaled register offset with update, issues over 2 cycles
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| H A D | ARMScheduleA9.td | 226 // Scaled register offset
267 // Scaled register offset with update
366 // Scaled register offset
403 // Scaled register offset with update
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| H A D | ARMInstrThumb.td | 89 // Scaled 4 immediate.
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | MachineTraceMetrics.h | 414 unsigned getCycles(unsigned Scaled) { in getCycles() argument
416 return (Scaled + Factor - 1) / Factor; in getCycles()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | SpillPlacement.cpp | 254 uint64_t Scaled = (Freq >> 13) + bool(Freq & (1 << 12)); in setThreshold() local
255 Threshold = std::max(UINT64_C(1), Scaled); in setThreshold()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 788 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled"; in print_details() local
789 OS << ", " << Signed << " " << Scaled << " offset"; in print_details()
800 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled"; in print_details() local
801 OS << ", " << Signed << " " << Scaled << " offset"; in print_details()
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| /openbsd-src/gnu/llvm/clang/lib/CodeGen/ |
| H A D | CodeGenPGO.cpp | 1073 uint64_t Scaled = Weight / Scale + 1; in scaleBranchWeight() local
1074 assert(Scaled <= UINT32_MAX && "overflow 32-bits"); in scaleBranchWeight()
1075 return Scaled; in scaleBranchWeight()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.cpp | 35 Scaled = 3 enumerator
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| /openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/ |
| H A D | BlockFrequencyInfoImpl.h | 215 Scaled64 Scaled; member
1420 Freqs[Node.Index].Scaled = Freq[BlockIndex[&BB]];
1422 Freqs[Node.Index].Scaled = Scaled64::getZero();
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Utils/ |
| H A D | ScalarEvolutionExpander.cpp | 510 Value *Scaled = in expandAddToGEP() local
514 GepIndices.push_back(Scaled); in expandAddToGEP()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 4812 // Scaled half-precision to 32-bit
4822 // Scaled half-precision to 64-bit
4831 // Scaled single-precision to 32-bit
4840 // Scaled single-precision to 64-bit
4848 // Scaled double-precision to 32-bit
4857 // Scaled double-precision to 64-bit
4940 // Scaled
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| H A D | AArch64InstrInfo.td | 4054 // Scaled floating point to integer conversion instructions.
4195 // Scaled integer to floating point conversion instructions.
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| H A D | AArch64ISelLowering.cpp | 19002 const bool Scaled = Opc == AArch64ISD::GLD1_SCALED_MERGE_ZERO || in performGLD1Combine() local
19038 unsigned NewOpc = getGatherVecOpcode(Scaled, OffsetIsSExt, true); in performGLD1Combine()
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| /openbsd-src/gnu/usr.bin/binutils/gas/po/ |
| H A D | gas.pot | 7317 msgid "Scaled-indexed addressing mode combined with scaled-index"
|
| H A D | tr.po | 7512 msgid "Scaled-indexed addressing mode combined with scaled-index"
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| /openbsd-src/gnu/usr.bin/binutils-2.17/gas/po/ |
| H A D | gas.pot | 7959 msgid "Scaled-indexed addressing mode combined with scaled-index"
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| H A D | tr.po | 8345 msgid "Scaled-indexed addressing mode combined with scaled-index"
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| /openbsd-src/gnu/usr.bin/texinfo/doc/ |
| H A D | texinfo.txi | 9399 @cindex Scaled points
|