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Searched refs:SXTW (Results 1 – 8 of 8) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AddressingModes.h48 SXTW, enumerator
67 case AArch64_AM::SXTW: return "sxtw"; in getShiftExtendName()
134 case 6: return AArch64_AM::SXTW; in getExtendType()
161 case AArch64_AM::SXTW: return 6; break; in getExtendEncoding()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64SchedPredicates.td24 def CheckExtSXTW : CheckImmOperand_s<3, "AArch64_AM::SXTW">;
38 def CheckMemExtSXTW : CheckImmOperand_s<3, "AArch64_AM::SXTW">;
H A DAArch64RegisterInfo.td1441 // SXTW(8|16|32|64)
1442 def ZPR#RegWidth#AsmOpndExtSXTW8Only : ZPRExtendAsmOperand<"SXTW", RegWidth, 8, 0b1>;
1443 def ZPR#RegWidth#AsmOpndExtSXTW8 : ZPRExtendAsmOperand<"SXTW", RegWidth, 8>;
1444 def ZPR#RegWidth#AsmOpndExtSXTW16 : ZPRExtendAsmOperand<"SXTW", RegWidth, 16>;
1445 def ZPR#RegWidth#AsmOpndExtSXTW32 : ZPRExtendAsmOperand<"SXTW", RegWidth, 32>;
1446 def ZPR#RegWidth#AsmOpndExtSXTW64 : ZPRExtendAsmOperand<"SXTW", RegWidth, 64>;
1448 …def ZPR#RegWidth#ExtSXTW8Only : ZPRExtendRegisterOperand<0b1, 0b0, "SXTW", RegWidth, 8, "On…
1449 def ZPR#RegWidth#ExtSXTW8 : ZPRExtendRegisterOperand<0b1, 0b0, "SXTW", RegWidth, 8>;
1450 def ZPR#RegWidth#ExtSXTW16 : ZPRExtendRegisterOperand<0b1, 0b0, "SXTW", RegWidth, 16>;
1451 def ZPR#RegWidth#ExtSXTW32 : ZPRExtendRegisterOperand<0b1, 0b0, "SXTW", RegWidth, 32>;
[all …]
H A DAArch64FastISel.cpp759 Addr.setExtendType(AArch64_AM::SXTW); in computeAddress()
841 Addr.setExtendType(AArch64_AM::SXTW); in computeAddress()
897 Addr.setExtendType(AArch64_AM::SXTW); in computeAddress()
1074 if (Addr.getExtendType() == AArch64_AM::SXTW || in simplifyAddress()
1087 else if (Addr.getExtendType() == AArch64_AM::SXTW) in simplifyAddress()
1147 bool IsSigned = Addr.getExtendType() == AArch64_AM::SXTW || in addLoadStoreOperands()
1830 Addr.getExtendType() == AArch64_AM::SXTW) in emitLoad()
2120 Addr.getExtendType() == AArch64_AM::SXTW) in emitStore()
3727 AArch64_AM::SXTW, /*ShiftImm=*/0, /*SetFlags=*/true, in fastLowerIntrinsicCall()
H A DAArch64ISelDAGToDAG.cpp771 return AArch64_AM::SXTW; in getExtendTypeForNode()
1248 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl, in SelectExtendedSHL()
1317 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl, in SelectAddrModeWRO()
1329 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl, in SelectAddrModeWRO()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h622 SXTW, enumerator
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp1315 ShiftExtendTy == AArch64_AM::SXTW) && in isSVEDataVectorRegWithShiftExtend()
1506 ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW || in isExtend()
1519 ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW; in isExtend64()
1544 return (ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW) && in isMemWExtend()
2104 bool IsSigned = ET == AArch64_AM::SXTW || ET == AArch64_AM::SXTX; in addMemExtendOperands()
2116 bool IsSigned = ET == AArch64_AM::SXTW || ET == AArch64_AM::SXTX; in addMemExtend8Operands()
3575 .Case("sxtw", AArch64_AM::SXTW) in tryParseOptionalShiftExtend()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp6092 case AArch64_AM::SXTW: in isSignExtendShiftType()
6183 if (SignExtend && Ext != AArch64_AM::SXTW) in selectExtendedSHL()
6412 unsigned SignExtend = Ext == AArch64_AM::SXTW; in selectAddrModeWRO()
6637 return AArch64_AM::SXTW; in getExtendTypeForInst()