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Searched refs:STH (Results 1 – 25 of 30) sorted by relevance

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/openbsd-src/gnu/llvm/lld/ELF/Arch/
H A DPPCInsns.def19 PCREL_OPT(STH, PSTH, OPC_AND_RST);
H A DPPC64.cpp56 STH = 44, enumerator
86 STH = 0xb0000000, enumerator
845 return STH; in getPPCDFormOp()
/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp62 StOpc = BPF::STH; in expandMEMCPY()
101 BuildMI(*BB, MI, dl, get(BPF::STH)) in expandMEMCPY()
H A DBPFMISimplifyPatchable.cpp121 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH || in checkADDrr()
139 if (Opcode == BPF::STB || Opcode == BPF::STH || Opcode == BPF::STW || in checkADDrr()
H A DBPFInstrInfo.td418 def STH : STOREi64<BPF_H, "u16", truncstorei16>;
/openbsd-src/gnu/usr.bin/binutils/opcodes/
H A Dm88k-dis.c83 …{0x28000000,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,NA,STH ,i16bit,1,0,1,0…
84 …{0xf4002800,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,NA,STH ,0,1,1,1,0…
85 …{0xf4002a00,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,NA,STH ,0,1,1,1,0…
86 …{0xf4002900,"st.h.usr ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,NA,STH ,0,1,1,1,0…
87 …{0xf4002b00,"st.h.usr ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,NA,STH ,0,1,1,1,0…
H A DChangeLog-00012098 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
/openbsd-src/gnu/usr.bin/binutils-2.17/include/opcode/
H A Dm88k.h285 #define STH LDHU+2 macro
/openbsd-src/gnu/usr.bin/binutils/include/opcode/
H A Dm88k.h284 #define STH LDHU+2 macro
/openbsd-src/gnu/usr.bin/binutils-2.17/opcodes/
H A Dm88k-dis.c80 …{0x28000000,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,NA,STH ,i16bit,1,0,1,0…
81 …{0xf4002800,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,NA,STH ,0,1,1,1,0…
82 …{0xf4002a00,"st.h ",{21,5,REG} ,{16,5,REG} ,{0,5,REGSC},{1,1,NA,STH ,0,1,1,1,0…
/openbsd-src/gnu/usr.bin/gcc/gcc/config/i370/
H A Di370.md315 return \"STH %1,140(,13)\;CLM %0,3,140(13)\";
316 return \"STH %1,140(,13)\;CH %0,140(,13)\";
916 return \"STH %1,%0\";
964 return \"STH %1,%0\";
1099 return \"STH %1,140(,13)\;ICM %0,3,140(13)\";
1122 return \"STH %1,140(,13)\;ICM %0,3,140(13)\";
1125 return \"STH %1,%0\";
1772 return \"STH %1,%0\";
2052 return \"STH %2,140(,13)\;AH %0,140(,13)\";
2263 return \"STH %2,140(,13)\;SH %0,140(,13)\";
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCPreEmitPeephole.cpp72 case PPC::STH: in hasPCRelativeForm()
H A DPPCFastISel.cpp633 Opc = Is32BitInt ? PPC::STH : PPC::STH8; in PPCEmitStore()
704 case PPC::STH : Opc = PPC::STHX; break; in PPCEmitStore()
H A DP10InstrResources.td1823 STH, STH8,
H A DPPCRegisterInfo.cpp108 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
/openbsd-src/sys/arch/hppa/hppa/
H A Ddb_disasm.c519 #define STH 0x19, 0x00, 0, 0 /* STORE HALFWORD */ macro
996 { STH, 0, "sth", stDasm },
/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.td803 // STH, STHY or STHH, depending on the choice of register.
806 defm STH : StoreRXPair<"sth", 0x40, 0xE370, truncstorei16, GR32, 2>;
813 defm : StoreGR64Pair<STH, STHY, truncstorei16>;
H A DSystemZInstrInfo.cpp1402 expandRXYPseudo(MI, SystemZ::STH, SystemZ::STHH); in expandPostRAPseudo()
H A DSystemZScheduleZEC12.td253 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
H A DSystemZScheduleZ196.td242 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
H A DSystemZScheduleZ13.td279 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
H A DSystemZScheduleZ15.td284 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
H A DSystemZScheduleZ14.td280 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
H A DSystemZScheduleZ16.td284 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.td635 defm STH : StoreA<"sth", 0b000110, 0b010110, truncstorei16, IntRegs, i32>;

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