Searched refs:SRsrc (Results 1 – 4 of 4) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.h | 167 bool SelectMUBUF(SDValue Addr, SDValue &SRsrc, SDValue &VAddr, 170 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, SDValue &VAddr, 175 bool SelectMUBUFScratchOffset(SDNode *Parent, SDValue Addr, SDValue &SRsrc, 178 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset,
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| H A D | AMDGPUISelDAGToDAG.cpp | 1322 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, in SelectMUBUFAddr64() argument 1342 SRsrc = SDValue(Lowering.wrapAddr64Rsrc(*CurDAG, DL, Ptr), 0); in SelectMUBUFAddr64() 1440 SDValue &SRsrc, in SelectMUBUFScratchOffset() argument 1451 SRsrc = CurDAG->getRegister(Info->getScratchRSrcReg(), MVT::v4i32); in SelectMUBUFScratchOffset() 1475 SRsrc = CurDAG->getRegister(Info->getScratchRSrcReg(), MVT::v4i32); in SelectMUBUFScratchOffset() 1481 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset() argument 1501 SRsrc = SDValue(Lowering.buildRSRC(*CurDAG, DL, Ptr, 0, Rsrc), 0); in SelectMUBUFOffset()
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| H A D | SILoadStoreOptimizer.cpp | 96 bool SRsrc = false; member 608 Result.SRsrc = true; in getRegs() 623 Result.SRsrc = true; in getRegs() 634 Result.SRsrc = true; in getRegs() 769 if (Regs.SRsrc) in setMI()
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| H A D | SIInstrInfo.cpp | 5665 Register SRsrc = MRI.createVirtualRegister(SRsrcRC); in emitLoadSRsrcFromVGPRLoop() local 5668 auto Merge = BuildMI(LoopBB, I, DL, TII.get(AMDGPU::REG_SEQUENCE), SRsrc); in emitLoadSRsrcFromVGPRLoop() 5676 Rsrc.setReg(SRsrc); in emitLoadSRsrcFromVGPRLoop() 5972 MachineOperand *SRsrc = getNamedOperand(MI, AMDGPU::OpName::srsrc); in legalizeOperands() local 5973 if (SRsrc && !RI.isSGPRClass(MRI.getRegClass(SRsrc->getReg()))) in legalizeOperands() 5974 CreatedBB = loadSRsrcFromVGPR(*this, MI, *SRsrc, MDT); in legalizeOperands()
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