| /openbsd-src/lib/libc/stdlib/ |
| H A D | heapsort.c | 103 #define SELECT(par_i, child_i, nmemb, par, child, size, k, count, tmp1, tmp2) { \ macro 170 SELECT(i, j, nmemb, t, p, size, k, cnt, tmp1, tmp2); in heapsort()
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| /openbsd-src/gnu/usr.bin/gcc/gcc/ |
| H A D | ra-colorize.c | 190 case SELECT: 222 || WEBS(FREEZE) || WEBS(SPILL) || WEBS(SELECT)) in reset_lists() 361 put_web (web, SELECT); 438 if (aweb->type != SELECT && aweb->type != COALESCED) 479 put_web (web, SELECT); in simplify() 483 if (pweb->type != SELECT && pweb->type != COALESCED) in simplify() 615 if (pweb->type == SELECT || pweb->type == COALESCED) 681 if (pweb->type != SELECT && pweb->type != COALESCED 803 if (pweb->type != SELECT && pweb->type != COALESCED) 1658 put_web (web, SELECT); [all …]
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| H A D | ra.h | 43 SELECT, enumerator
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| /openbsd-src/gnu/usr.bin/gcc/gcc/testsuite/gcc.c-torture/compile/ |
| H A D | 20031031-2.c | 8 SELECT, enumerator
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 3116 { ISD::SELECT, MVT::v2f64, { 4, 4, 1, 3 } }, // vblendvpd in getCmpSelInstrCost() 3117 { ISD::SELECT, MVT::v4f32, { 4, 4, 1, 3 } }, // vblendvps in getCmpSelInstrCost() 3118 { ISD::SELECT, MVT::v2i64, { 4, 4, 1, 3 } }, // pblendvb in getCmpSelInstrCost() 3119 { ISD::SELECT, MVT::v8i32, { 4, 4, 1, 3 } }, // pblendvb in getCmpSelInstrCost() 3120 { ISD::SELECT, MVT::v8i16, { 4, 4, 1, 3 } }, // pblendvb in getCmpSelInstrCost() 3121 { ISD::SELECT, MVT::v16i8, { 4, 4, 1, 3 } }, // pblendvb in getCmpSelInstrCost() 3130 { ISD::SELECT, MVT::v32i16, { 1, 1, 1, 1 } }, in getCmpSelInstrCost() 3131 { ISD::SELECT, MVT::v64i8, { 1, 1, 1, 1 } }, in getCmpSelInstrCost() 3148 { ISD::SELECT, MVT::v8i64, { 1, 1, 1, 1 } }, in getCmpSelInstrCost() 3149 { ISD::SELECT, MVT::v4i64, { 1, 1, 1, 1 } }, in getCmpSelInstrCost() [all …]
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| /openbsd-src/bin/ksh/ |
| H A D | lex.h | 72 #define SELECT 268 macro
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| H A D | syn.c | 316 case SELECT: in get_command() 641 { "select", SELECT, true },
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 434 ISD::SELECT, ISD::VSELECT, ISD::SELECT_CC, in AMDGPUTargetLowering() 461 setOperationAction(ISD::SELECT, MVT::v2f32, Promote); in AMDGPUTargetLowering() 462 AddPromotedToType(ISD::SELECT, MVT::v2f32, MVT::v2i32); in AMDGPUTargetLowering() 464 setOperationAction(ISD::SELECT, MVT::v3f32, Promote); in AMDGPUTargetLowering() 465 AddPromotedToType(ISD::SELECT, MVT::v3f32, MVT::v3i32); in AMDGPUTargetLowering() 467 setOperationAction(ISD::SELECT, MVT::v4f32, Promote); in AMDGPUTargetLowering() 468 AddPromotedToType(ISD::SELECT, MVT::v4f32, MVT::v4i32); in AMDGPUTargetLowering() 470 setOperationAction(ISD::SELECT, MVT::v5f32, Promote); in AMDGPUTargetLowering() 471 AddPromotedToType(ISD::SELECT, MVT::v5f32, MVT::v5i32); in AMDGPUTargetLowering() 473 setOperationAction(ISD::SELECT, MVT::v6f32, Promote); in AMDGPUTargetLowering() [all …]
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| /openbsd-src/gnu/usr.bin/perl/os2/OS2/OS2-REXX/t/ |
| H A D | rx_tiesql.test | 57 SELECT name FROM sysibm.systables
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| H A D | rx_sql.test | 66 SELECT name FROM sysibm.systables
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| /openbsd-src/gnu/usr.bin/gcc/gcc/f/ |
| H A D | str-2t.fin | 52 Select SELECT
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| H A D | str-1t.fin | 119 Select SELECT
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| H A D | ffe.texi | 1611 * Transforming SELECT CASE:: 1783 @node Transforming SELECT CASE 1784 @subsection Transforming SELECT CASE 1786 @code{SELECT CASE} poses a few interesting problems for code generation, 1789 Consider @samp{SELECT CASE (I('PREFIX'//A))}, 1797 which in turn is within the @code{SELECT CASE} block itself 1846 is with @samp{SELECT CASE('prefix'//A)} 1851 the FFE has to implement @code{SELECT CASE} on @code{CHARACTER} 1867 as if @samp{SELECT CASE(temp0)} had been written. 1889 Both of these solutions require @code{SELECT CASE} implementation [all …]
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| /openbsd-src/gnu/usr.bin/perl/cpan/Encode/ucm/ |
| H A D | cp424.ucm | 140 <U0080> \x20 |0 # DIGIT SELECT 168 <U009C> \x04 |0 # SELECT
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| /openbsd-src/sys/dev/microcode/siop/ |
| H A D | oosiop.ss | 77 SELECT ATN 0, REL(wait_reselect)
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.h | 49 SELECT, enumerator
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| H A D | M68kInstrCompiler.td | 53 // CMOV* - Used to implement the SELECT DAG operation. Expanded after
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| H A D | M68kISelLowering.cpp | 128 setOperationAction(ISD::SELECT, VT, Custom); in M68kTargetLowering() 1365 case ISD::SELECT: in LowerOperation() 1659 !(User->getOpcode() == ISD::SELECT && UOpNo == 0)) in hasNonFlagsUse() 3313 Lo = DAG.getNode(ISD::SELECT, DL, VT, CC, LoTrue, Zero); in LowerShiftLeftParts() 3314 Hi = DAG.getNode(ISD::SELECT, DL, VT, CC, HiTrue, HiFalse); in LowerShiftLeftParts() 3368 Lo = DAG.getNode(ISD::SELECT, DL, VT, CC, LoTrue, LoFalse); in LowerShiftRightParts() 3369 Hi = DAG.getNode(ISD::SELECT, DL, VT, CC, HiTrue, HiFalse); in LowerShiftRightParts() 3528 case M68kISD::SELECT: in getTargetNodeName()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 713 SELECT, enumerator
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 441 assert(MI.getOpcode() == Lanai::SELECT && "unknown select instruction"); in analyzeSelect() 494 assert(MI.getOpcode() == Lanai::SELECT && "unknown select instruction"); in optimizeSelect()
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| /openbsd-src/gnu/usr.bin/perl/t/op/ |
| H A D | tie.t | 650 tie $SELECT, 'main'; 651 $SELECT = *STDERR;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrFloat.td | 111 // ISD::SELECT requires its operand to conform to getBooleanContents, but
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 339 setOperationAction(ISD::SELECT, MVT::f32, Custom); in MipsTargetLowering() 340 setOperationAction(ISD::SELECT, MVT::f64, Custom); in MipsTargetLowering() 341 setOperationAction(ISD::SELECT, MVT::i32, Custom); in MipsTargetLowering() 357 setOperationAction(ISD::SELECT, MVT::i64, Custom); in MipsTargetLowering() 483 setTargetDAGCombine({ISD::SDIVREM, ISD::UDIVREM, ISD::SELECT, ISD::AND, in MipsTargetLowering() 696 return DAG.getNode(ISD::SELECT, DL, FalseTy, SetCC, False, True); in performSELECTCombine() 1155 case ISD::SELECT: in PerformDAGCombine() 1224 case ISD::SELECT: return lowerSELECT(Op, DAG); in LowerOperation() 2602 Lo = DAG.getNode(ISD::SELECT, DL, VT, Cond, in lowerShiftLeftParts() 2604 Hi = DAG.getNode(ISD::SELECT, DL, VT, Cond, ShiftLeftLo, Or); in lowerShiftLeftParts() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 923 if (CostKind == TTI::TCK_CodeSize && ISD == ISD::SELECT && in getCmpSelInstrCost() 993 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT && CondTy) { in getCmpSelInstrCost() 996 { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4*4 + 1*2 + 1 }, in getCmpSelInstrCost() 997 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 }, in getCmpSelInstrCost() 998 { ISD::SELECT, MVT::v16i1, MVT::v16i64, 100 } in getCmpSelInstrCost()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1037 if (Op.getOpcode() != ISD::SELECT) in ppSimplifyOrSelect0() 1048 if (SOp.getOpcode() == ISD::SELECT && SOp.getNode()->hasOneUse()) { in ppSimplifyOrSelect0() 1055 SDValue NewSel = DAG.getNode(ISD::SELECT, DLS, VT, SC, NewOr, VOp); in ppSimplifyOrSelect0() 1059 SDValue NewSel = DAG.getNode(ISD::SELECT, DLS, VT, SC, VOp, NewOr); in ppSimplifyOrSelect0() 1254 SDValue Sel = DAG.getNode(ISD::SELECT, dl, SVT, OpI1, in ppHoistZextI1()
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