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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.h80 bool IgnoreNodeResults(SDNode *N) const { in IgnoreNodeResults()
137 SmallVector<SDNode*, 128> Worklist;
179 void NoteDeletion(SDNode *Old, SDNode *New) { in NoteDeletion()
210 SDNode *AnalyzeNewNode(SDNode *N);
220 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
221 bool CustomWidenLowerNode(SDNode *N, EVT VT);
226 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
230 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
295 SDValue PromoteIntOpVectorReduction(SDNode *N, SDValue V);
298 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
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H A DSelectionDAGPrinter.cpp37 return ((const SDNode *) Node)->getNumValues(); in numEdgeDestLabels()
41 return ((const SDNode *) Node)->getValueType(i).getEVTString(); in getEdgeDestLabel()
46 return itostr(I - SDNodeIterator::begin((const SDNode *) Node)); in getEdgeSourceLabel()
62 SDNode *TargetNode = *I; in getEdgeTarget()
76 static std::string getNodeIdentifierLabel(const SDNode *Node, in getNodeIdentifierLabel()
103 static std::string getSimpleNodeLabel(const SDNode *Node, in getSimpleNodeLabel()
112 std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph);
113 static std::string getNodeAttributes(const SDNode *N, in getNodeAttributes()
137 std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node, in getNodeLabel()
191 void SelectionDAG::setGraphAttrs(const SDNode *N, const char *Attrs) { in setGraphAttrs()
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H A DSDNodeDbgValue.h25 class SDNode; variable
42 SDNode *getSDNode() const { in getSDNode()
71 static SDDbgOperand fromNode(SDNode *Node, unsigned ResNo) { in fromNode()
105 SDNode *Node; ///< Valid for expressions.
114 SDDbgOperand(SDNode *N, unsigned R) : kind(SDNODE) { in SDDbgOperand()
145 SDNode **AdditionalDependencies;
157 ArrayRef<SDDbgOperand> L, ArrayRef<SDNode *> Dependencies, in SDDbgValue()
162 AdditionalDependencies(Alloc.Allocate<SDNode *>(Dependencies.size())), in SDDbgValue()
194 SmallVector<SDNode *> getSDNodes() const { in getSDNodes()
195 SmallVector<SDNode *> Dependencies; in getSDNodes()
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H A DScheduleDAGSDNodes.cpp68 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) { in newSUnit()
110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, in CheckForPhysRegDependency()
143 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, ArrayRef<EVT> VTs, in CloneNodeWithValues()
164 static bool AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) { in AddGlue()
165 SDNode *GlueDestNode = Glue.getNode(); in AddGlue()
189 static void RemoveUnusedGlue(SDNode *N, SelectionDAG *DAG) { in RemoveUnusedGlue()
203 void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) { in ClusterNeighboringLoads()
214 auto hasTiedInput = [this](const SDNode *N) { in ClusterNeighboringLoads()
226 SmallPtrSet<SDNode*, 16> Visited; in ClusterNeighboringLoads()
228 DenseMap<long long, SDNode*> O2SMap; // Map from offset to SDNode. in ClusterNeighboringLoads()
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H A DLegalizeFloatTypes.cpp51 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { in SoftenFloatResult()
160 SDValue DAGTypeLegalizer::SoftenFloatRes_Unary(SDNode *N, RTLIB::Libcall LC) { in SoftenFloatRes_Unary()
179 SDValue DAGTypeLegalizer::SoftenFloatRes_Binary(SDNode *N, RTLIB::Libcall LC) { in SoftenFloatRes_Binary()
200 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N) { in SoftenFloatRes_BITCAST()
204 SDValue DAGTypeLegalizer::SoftenFloatRes_FREEZE(SDNode *N) { in SoftenFloatRes_FREEZE()
210 SDValue DAGTypeLegalizer::SoftenFloatRes_ARITH_FENCE(SDNode *N) { in SoftenFloatRes_ARITH_FENCE()
217 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N, in SoftenFloatRes_MERGE_VALUES()
223 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) { in SoftenFloatRes_BUILD_PAIR()
232 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N) { in SoftenFloatRes_ConstantFP()
256 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) { in SoftenFloatRes_EXTRACT_VECTOR_ELT()
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H A DInstrEmitter.h47 void EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
50 void CreateVirtualRegisters(SDNode *Node,
90 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, Register> &VRBaseMap,
97 void EmitCopyToRegClassNode(SDNode *Node,
102 void EmitRegSequence(SDNode *Node, DenseMap<SDValue, Register> &VRBaseMap,
108 static unsigned CountResults(SDNode *Node);
142 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned, in EmitNode()
162 void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
164 void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
H A DScheduleDAGFast.cpp210 SDNode *N = SU->getNode(); in CopyAndMoveSuccessors()
230 SmallVector<SDNode*, 2> NewNodes; in CopyAndMoveSuccessors()
238 SDNode *LoadNode = NewNodes[0]; in CopyAndMoveSuccessors()
380 SUnit *CopyFromSU = newSUnit(static_cast<SDNode *>(nullptr)); in InsertCopiesAndMoveSuccs()
384 SUnit *CopyToSU = newSUnit(static_cast<SDNode *>(nullptr)); in InsertCopiesAndMoveSuccs()
421 static MVT getPhysicalRegisterVT(SDNode *N, unsigned Reg, in getPhysicalRegisterVT()
448 const SDNode *Node = nullptr) { in CheckForLiveRegDef()
490 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) { in DelayForLiveRegsBottomUp()
522 SDNode *SrcNode = Node->getOperand(2).getNode(); in DelayForLiveRegsBottomUp()
668 std::vector<SDNode*> Sequence;
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H A DScheduleDAGSDNodes.h65 static bool isPassiveNode(SDNode *Node) { in isPassiveNode()
86 SUnit *newSUnit(SDNode *N);
107 virtual void computeOperandLatency(SDNode *Def, SDNode *Use,
140 const SDNode *Node;
155 const SDNode *GetNode() const { in GetNode()
178 void ClusterNeighboringLoads(SDNode *Node);
H A DLegalizeVectorOps.cpp75 SDValue TranslateLegalizeResults(SDValue Op, SDNode *Result);
85 bool LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results);
88 SDValue UnrollVSETCC(SDNode *Node);
94 void Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results);
98 void ExpandFP_TO_UINT(SDNode *Node, SmallVectorImpl<SDValue> &Results);
102 void ExpandUINT_TO_FLOAT(SDNode *Node, SmallVectorImpl<SDValue> &Results);
105 SDValue ExpandSEXTINREG(SDNode *Node);
112 SDValue ExpandANY_EXTEND_VECTOR_INREG(SDNode *Node);
119 SDValue ExpandSIGN_EXTEND_VECTOR_INREG(SDNode *Node);
125 SDValue ExpandZERO_EXTEND_VECTOR_INREG(SDNode *Node);
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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.h59 void Select(SDNode *N) override;
78 MachineSDNode *LoadInstrForLoadIntrinsic(SDNode *IntN);
82 SDNode *StoreInstrForLoadIntrinsic(MachineSDNode *LoadN, SDNode *IntN);
84 void SelectFrameIndex(SDNode *N);
91 bool SelectBrevLdIntrinsic(SDNode *IntN);
92 bool SelectNewCircIntrinsic(SDNode *IntN);
93 void SelectLoad(SDNode *N);
96 void SelectStore(SDNode *N);
97 void SelectSHL(SDNode *N);
98 void SelectIntrinsicWChain(SDNode *N);
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/openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.h58 void Select(SDNode *N) override;
59 bool tryIntrinsicNoChain(SDNode *N);
60 bool tryIntrinsicChain(SDNode *N);
61 void SelectTexSurfHandle(SDNode *N);
62 bool tryLoad(SDNode *N);
63 bool tryLoadVector(SDNode *N);
64 bool tryLDGLDU(SDNode *N);
65 bool tryStore(SDNode *N);
66 bool tryStoreVector(SDNode *N);
67 bool tryLoadParam(SDNode *N);
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/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrFragmentsSIMD.td18 def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
21 def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
38 def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
39 def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
40 def X86fmins : SDNode<"X86ISD::FMINS", SDTFPBinOp>;
41 def X86fmaxs : SDNode<"X86ISD::FMAXS", SDTFPBinOp>;
44 def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
46 def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
49 def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
51 def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
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/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.h56 static inline SDNode *packConstantV2I16(const SDNode *N, SelectionDAG &DAG,
72 static inline SDNode *packNegConstantV2I16(const SDNode *N, SelectionDAG &DAG) { in packNegConstantV2I16()
103 bool matchLoadD16FromBuildVector(SDNode *N) const;
107 void Select(SDNode *N) override;
112 void SelectBuildVector(SDNode *N, unsigned RegClassID);
116 bool isInlineImmediate(const SDNode *N, bool Negated = false) const;
117 bool isNegInlineImmediate(const SDNode *N) const { in isNegInlineImmediate()
137 bool isVGPRImm(const SDNode *N) const;
138 bool isUniformLoad(const SDNode *N) const;
139 bool isUniformBr(const SDNode *N) const;
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H A DAMDGPUInstrInfo.td68 def AMDGPUif : SDNode<"AMDGPUISD::IF", AMDGPUIfOp, [SDNPHasChain]>;
69 def AMDGPUelse : SDNode<"AMDGPUISD::ELSE", AMDGPUElseOp, [SDNPHasChain]>;
70 def AMDGPUloop : SDNode<"AMDGPUISD::LOOP", AMDGPULoopOp, [SDNPHasChain]>;
72 def callseq_start : SDNode<"ISD::CALLSEQ_START",
77 def callseq_end : SDNode<"ISD::CALLSEQ_END",
82 def AMDGPUcall : SDNode<"AMDGPUISD::CALL",
88 def AMDGPUtc_return: SDNode<"AMDGPUISD::TC_RETURN",
93 def AMDGPUtrap : SDNode<"AMDGPUISD::TRAP",
98 def AMDGPUconstdata_ptr : SDNode<
104 def AMDGPUdwordaddr : SDNode<"AMDGPUISD::DWORDADDR", SDTIntUnaryOp>;
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H A DSIISelLowering.h166 SDNode *adjustWritemask(MachineSDNode *&N, SelectionDAG &DAG) const;
168 SDValue performUCharToFloatCombine(SDNode *N,
170 SDValue performSHLPtrCombine(SDNode *N,
181 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const;
182 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const;
183 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const;
184 SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const;
185 SDValue performSignExtendInRegCombine(SDNode *N, DAGCombinerInfo &DCI) const;
186 SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const;
189 SDValue performFCanonicalizeCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DAMDGPUISelLowering.h82 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
83 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
84 SDValue performAssertSZExtCombine(SDNode *N, DAGCombinerInfo &DCI) const;
85 SDValue performIntrinsicWOChainCombine(SDNode *N, DAGCombinerInfo &DCI) const;
90 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const;
91 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const;
92 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const;
93 SDValue performTruncateCombine(SDNode *N, DAGCombinerInfo &DCI) const;
94 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const;
95 SDValue performMulLoHiCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DSelectionDAGISel.h85 virtual void Select(SDNode *N) = 0;
100 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
106 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
110 static void InvalidateNodeId(SDNode *N);
111 static int getUninvalidatedNodeId(SDNode *N);
113 static void EnforceNodeIdInvariant(SDNode *N);
222 void ReplaceUses(SDNode *F, SDNode *T) { in ReplaceUses()
228 void ReplaceNode(SDNode *F, SDNode *T) { in ReplaceNode()
273 virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const { in CheckNodePredicate()
283 SDNode *N, unsigned PredNo, in CheckNodePredicateWithOperands()
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H A DSelectionDAGNodes.h67 class SDNode; variable
72 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr,
91 bool isConstantSplatVector(const SDNode *N, APInt &SplatValue);
96 bool isConstantSplatVectorAllOnes(const SDNode *N,
102 bool isConstantSplatVectorAllZeros(const SDNode *N,
107 bool isBuildVectorAllOnes(const SDNode *N);
111 bool isBuildVectorAllZeros(const SDNode *N);
115 bool isBuildVectorOfConstantSDNodes(const SDNode *N);
119 bool isBuildVectorOfConstantFPSDNodes(const SDNode *N);
123 bool isVectorShrinkable(const SDNode *N, unsigned NewEltSize, bool Signed);
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H A DSelectionDAG.h138 template <> struct ilist_alloc_traits<SDNode> {
139 static void deleteNode(SDNode *) {
160 using DbgValMapType = DenseMap<const SDNode *, SmallVector<SDDbgValue *, 2>>;
174 void erase(const SDNode *Node);
190 ArrayRef<SDDbgValue*> getSDDbgValues(const SDNode *Node) const {
249 SDNode EntryNode;
255 ilist<SDNode> AllNodes;
259 using NodeAllocatorType = RecyclingAllocator<BumpPtrAllocator, SDNode,
268 FoldingSet<SDNode> CSEMap;
287 DenseMap<const SDNode *, NodeExtraInfo> SDEI;
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/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVVPInstrInfo.td1 //===-------------- VVPInstrInfo.td - VVP_* SDNode patterns ---------------===//
15 // The standard The VVP layer SDNode. The VE vector instruction.
16 // SDNode.
127 class vvp_commutative<SDNode RootOp> :
133 class vvp_fma_commutative<SDNode RootOp> :
140 def vvp_add : SDNode<"VEISD::VVP_ADD", SDTIntBinOpVVP>;
143 def vvp_sub : SDNode<"VEISD::VVP_SUB", SDTIntBinOpVVP>;
145 def vvp_mul : SDNode<"VEISD::VVP_MUL", SDTIntBinOpVVP>;
148 def vvp_sdiv : SDNode<"VEISD::VVP_SDIV", SDTIntBinOpVVP>;
149 def vvp_udiv : SDNode<"VEISD::VVP_UDIV", SDTIntBinOpVVP>;
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/openbsd-src/gnu/llvm/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td46 // SDTCisVTSmallerThanOp - The specified operand is a VT SDNode, and its type is
323 class SDNode<string opcode, SDTypeProfile typeprof,
324 list<SDNodeProperty> props = [], string sdclass = "SDNode">
338 def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">;
339 def timm : SDNode<"ISD::TargetConstant",SDTIntLeaf, [], "ConstantSDNode">;
340 def fpimm : SDNode<"ISD::ConstantFP", SDTFPLeaf , [], "ConstantFPSDNode">;
341 def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">;
342 def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">;
343 def cond : SDNode<"ISD::CONDCODE" , SDTOther , [], "CondCodeSDNode">;
344 def undef : SDNode<"ISD::UNDEF" , SDTUNDEF , []>;
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/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZOperators.td230 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
232 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
235 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
238 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
240 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
243 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
246 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
249 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
252 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
253 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET",
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/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.h44 void Select(SDNode *Node) override;
53 bool tryShrinkShlLogicImm(SDNode *Node);
79 bool hasAllNBitUsers(SDNode *Node, unsigned Bits,
81 bool hasAllHUsers(SDNode *Node) const { return hasAllNBitUsers(Node, 16); } in hasAllHUsers()
82 bool hasAllWUsers(SDNode *Node) const { return hasAllNBitUsers(Node, 32); } in hasAllWUsers()
97 void addVectorLoadStoreOperands(SDNode *Node, unsigned SEWImm,
103 void selectVLSEG(SDNode *Node, bool IsMasked, bool IsStrided);
104 void selectVLSEGFF(SDNode *Node, bool IsMasked);
105 void selectVLXSEG(SDNode *Node, bool IsMasked, bool IsOrdered);
106 void selectVSSEG(SDNode *Node, bool IsMasked, bool IsStrided);
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/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kISelDAGToDAG.cpp185 bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const override;
201 void Select(SDNode *N) override;
218 std::pair<bool, SDNode *> selectNode(SDNode *Node);
220 bool SelectARI(SDNode *Parent, SDValue N, SDValue &Base);
221 bool SelectARIPI(SDNode *Parent, SDValue N, SDValue &Base);
222 bool SelectARIPD(SDNode *Parent, SDValue N, SDValue &Base);
223 bool SelectARID(SDNode *Parent, SDValue N, SDValue &Imm, SDValue &Base);
224 bool SelectARII(SDNode *Parent, SDValue N, SDValue &Imm, SDValue &Base,
226 bool SelectAL(SDNode *Parent, SDValue N, SDValue &Sym);
227 bool SelectPCD(SDNode *Parent, SDValue N, SDValue &Imm);
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/openbsd-src/gnu/llvm/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp41 bool SelectAddr(SDNode *Op, SDValue N, SDValue &Base, SDValue &Disp);
43 bool selectIndexedLoad(SDNode *N);
53 void Select(SDNode *N) override;
54 bool trySelect(SDNode *N);
56 template <unsigned NodeType> bool select(SDNode *N);
57 bool selectMultiplication(SDNode *N);
73 bool AVRDAGToDAGISel::SelectAddr(SDNode *Op, SDValue N, SDValue &Base, in SelectAddr()
130 bool AVRDAGToDAGISel::selectIndexedLoad(SDNode *N) { in selectIndexedLoad()
168 SDNode *ResNode = in selectIndexedLoad()
305 template <> bool AVRDAGToDAGISel::select<ISD::FrameIndex>(SDNode *N) { in select()
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