Searched refs:RegVal (Results 1 – 9 of 9) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/ |
| H A D | SnippetFile.cpp | 51 RegisterValue RegVal; in HandleComment() local
61 if (!(RegVal.Register = findRegisterByName(Parts[0].trim()))) { in HandleComment()
68 RegVal.Value = APInt( in HandleComment()
70 Result->Key.RegisterInitialValues.push_back(std::move(RegVal)); in HandleComment()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCInst.h | 49 unsigned RegVal; member
71 return RegVal; in getReg()
77 RegVal = Reg; in setReg()
137 Op.RegVal = Reg; in createReg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 294 unsigned RegVal = GPRDecoderTable[(Insn >> 4) & 0x1f]; in decodeLoadStore() local
302 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
309 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
356 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
366 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
381 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
387 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 542 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeRegAsMultipleOf() local
543 return RegVal / Multiple; in EncodeRegAsMultipleOf()
558 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeZPR2StridedRegisterClass() local
559 unsigned T = (RegVal & 0x10) >> 1; in EncodeZPR2StridedRegisterClass()
560 unsigned Zt = RegVal & 0x7; in EncodeZPR2StridedRegisterClass()
568 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeZPR4StridedRegisterClass() local
569 unsigned T = (RegVal & 0x10) >> 2; in EncodeZPR4StridedRegisterClass()
570 unsigned Zt = RegVal & 0x3; in EncodeZPR4StridedRegisterClass()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 52 unsigned RegVal; member
76 return RegVal; in getReg()
101 Op.RegVal = Reg; in createReg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetMachine.cpp | 1449 auto parseRegister = [&](const yaml::StringValue &RegName, Register &RegVal) { in parseMachineFunctionInfo() argument
1455 RegVal = TempReg; in parseMachineFunctionInfo()
1461 Register &RegVal) { in parseMachineFunctionInfo() argument
1462 return !RegName.Value.empty() && parseRegister(RegName, RegVal); in parseMachineFunctionInfo()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 4537 unsigned RegVal = getContext().getRegisterInfo()->getEncodingValue(Reg); in tryParseVectorList() local
4541 Stride = (PrevRegVal < RegVal) ? (RegVal - PrevRegVal) in tryParseVectorList()
4542 : (RegVal + NumRegs - PrevRegVal); in tryParseVectorList()
4547 if (Stride == 0 || RegVal != ((PrevRegVal + Stride) % NumRegs)) { in tryParseVectorList()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1016 SDValue RegVal = DAG.getCopyFromReg(Chain, DL, F.VReg, F.VT); in LowerFormalArguments() local
1018 Chain = DAG.getCopyToReg(Chain, DL, F.VReg, RegVal); in LowerFormalArguments()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4075 SDValue RegVal = DAG.getCopyFromReg(Chain, DL, FR.VReg, FR.VT); in forwardMustTailParameters() local
4078 Chain = DAG.getCopyToReg(Chain, DL, FR.VReg, RegVal); in forwardMustTailParameters()
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