Searched refs:RegBitWidth (Results 1 – 4 of 4) sorted by relevance
15 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) { in getLoadImmediateOpcode() argument16 switch (RegBitWidth) { in getLoadImmediateOpcode()26 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth, in loadImmediate() argument28 if (Value.getBitWidth() > RegBitWidth) in loadImmediate()30 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth)) in loadImmediate()
43 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) { in getLoadImmediateOpcode() argument44 switch (RegBitWidth) { in getLoadImmediateOpcode()54 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth, in loadImmediate() argument56 if (Value.getBitWidth() > RegBitWidth) in loadImmediate()61 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth)) in loadImmediate()
438 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) { in getLoadImmediateOpcode() argument439 switch (RegBitWidth) { in getLoadImmediateOpcode()453 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth, in loadImmediate() argument455 if (Value.getBitWidth() > RegBitWidth) in loadImmediate()457 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth)) in loadImmediate()510 std::vector<MCInst> loadAndFinalize(unsigned Reg, unsigned RegBitWidth,538 unsigned RegBitWidth, in loadAndFinalize() argument540 assert((RegBitWidth & 7) == 0 && "RegBitWidth must be a multiple of 8 bits"); in loadAndFinalize()541 initStack(RegBitWidth / 8); in loadAndFinalize()543 add(releaseStackSpace(RegBitWidth / 8)); in loadAndFinalize()
2886 const unsigned RegBitWidth = AMDGPU::getRegBitWidth(*RC->MC); in getRegSplitParts() local2887 assert(RegBitWidth >= 32 && RegBitWidth <= 1024); in getRegSplitParts()2889 const unsigned RegDWORDs = RegBitWidth / 32; in getRegSplitParts()