| /openbsd-src/gnu/usr.bin/gcc/gcc/testsuite/gcc.c-torture/execute/ |
| H A D | 20020508-2.c | 7 #define ROR(a,b) (((a) >> (b)) | ((a) << ((sizeof (a) * CHAR_BIT) - (b)))) macro
29 if (ROR (c, shift1) != ROR (CHAR_VALUE, SHIFT1)) in main()
32 if (ROR (c, SHIFT1) != ROR (CHAR_VALUE, SHIFT1)) in main()
35 if (ROR (s, shift1) != ROR (SHORT_VALUE, SHIFT1)) in main()
38 if (ROR (s, SHIFT1) != ROR (SHORT_VALUE, SHIFT1)) in main()
41 if (ROR (i, shift1) != ROR (INT_VALUE, SHIFT1)) in main()
44 if (ROR (i, SHIFT1) != ROR (INT_VALUE, SHIFT1)) in main()
47 if (ROR (l, shift1) != ROR (LONG_VALUE, SHIFT1)) in main()
50 if (ROR (l, SHIFT1) != ROR (LONG_VALUE, SHIFT1)) in main()
53 if (ROR (ll, shift1) != ROR (LL_VALUE, SHIFT1)) in main()
[all …]
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| H A D | 20020226-1.c | 9 #define ROR(a,b) (((a) >> (b)) | ((a) << ((sizeof (a) * CHAR_BIT) - (b)))) macro
31 if (ROR (uc, shift1) != ROR (CHAR_VALUE, SHIFT1)) in main()
34 if (ROR (uc, SHIFT1) != ROR (CHAR_VALUE, SHIFT1)) in main()
37 if (ROR (us, shift1) != ROR (SHORT_VALUE, SHIFT1)) in main()
40 if (ROR (us, SHIFT1) != ROR (SHORT_VALUE, SHIFT1)) in main()
43 if (ROR (ui, shift1) != ROR (INT_VALUE, SHIFT1)) in main()
46 if (ROR (ui, SHIFT1) != ROR (INT_VALUE, SHIFT1)) in main()
49 if (ROR (ul, shift1) != ROR (LONG_VALUE, SHIFT1)) in main()
52 if (ROR (ul, SHIFT1) != ROR (LONG_VALUE, SHIFT1)) in main()
55 if (ROR (ull, shift1) != ROR (LL_VALUE, SHIFT1)) in main()
[all …]
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| H A D | 20020508-1.c | 9 #define ROR(a,b) (((a) >> (b)) | ((a) << ((sizeof (a) * CHAR_BIT) - (b)))) macro
31 if (ROR (uc, shift1) != ROR (CHAR_VALUE, SHIFT1)) in main()
34 if (ROR (uc, SHIFT1) != ROR (CHAR_VALUE, SHIFT1)) in main()
37 if (ROR (us, shift1) != ROR (SHORT_VALUE, SHIFT1)) in main()
40 if (ROR (us, SHIFT1) != ROR (SHORT_VALUE, SHIFT1)) in main()
43 if (ROR (ui, shift1) != ROR (INT_VALUE, SHIFT1)) in main()
46 if (ROR (ui, SHIFT1) != ROR (INT_VALUE, SHIFT1)) in main()
49 if (ROR (ul, shift1) != ROR (LONG_VALUE, SHIFT1)) in main()
52 if (ROR (ul, SHIFT1) != ROR (LONG_VALUE, SHIFT1)) in main()
55 if (ROR (ull, shift1) != ROR (LL_VALUE, SHIFT1)) in main()
[all …]
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| H A D | 20020508-3.c | 7 #define ROR(a,b) (((a) >> (b)) | ((a) << ((sizeof (a) * CHAR_BIT) - (b)))) macro
29 if (ROR (c, shift1) != ROR (CHAR_VALUE, SHIFT1)) in main()
32 if (ROR (c, SHIFT1) != ROR (CHAR_VALUE, SHIFT1)) in main()
35 if (ROR (s, shift1) != ROR (SHORT_VALUE, SHIFT1)) in main()
38 if (ROR (s, SHIFT1) != ROR (SHORT_VALUE, SHIFT1)) in main()
41 if (ROR (i, shift1) != ROR (INT_VALUE, SHIFT1)) in main()
44 if (ROR (i, SHIFT1) != ROR (INT_VALUE, SHIFT1)) in main()
47 if (ROR (l, shift1) != ROR (LONG_VALUE, SHIFT1)) in main()
50 if (ROR (l, SHIFT1) != ROR (LONG_VALUE, SHIFT1)) in main()
53 if (ROR (ll, shift1) != ROR (LL_VALUE, SHIFT1)) in main()
[all …]
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| /openbsd-src/lib/libcrypto/sha/asm/ |
| H A D | sha512-ppc.pl | 76 $ROR="rotrdi";
88 $ROR="rotrwi";
127 $ROR $a0,$e,$Sigma1[0]
128 $ROR $a1,$e,$Sigma1[1]
133 $ROR $a1,$a1,`$Sigma1[2]-$Sigma1[1]`
140 $ROR $a0,$a,$Sigma0[0]
141 $ROR $a1,$a,$Sigma0[1]
145 $ROR $a1,$a1,`$Sigma0[2]-$Sigma0[1]`
161 $ROR $a0,@X[($i+1)%16],$sigma0[0]
162 $ROR $a1,@X[($i+1)%16],$sigma0[1]
[all …]
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| /openbsd-src/sys/crypto/ |
| H A D | michael.c | 31 #define ROR(n, x) (((x) >> (n)) | ((x) << (32 - (n)))) macro
52 r ^= ROR(2, l); \
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kInstrShiftRotate.td | 16 /// ROL [~] ROR [~] ROXL [ ] ROXR [ ]
98 defm ROR : MxSROp<"ror", rotr, MxRODI_R, MxROOP_RO>;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 38 ROR, enumerator
59 case AArch64_AM::ROR: return "ror"; in getShiftExtendName()
80 case 3: return AArch64_AM::ROR; in getShiftType()
108 case AArch64_AM::ROR: STEnc = 3; break; in getShifterImm()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedPredExynos.td | 140 // Identify EXTR as the alias for ROR (immediate).
|
| H A D | AArch64SchedPredicates.td | 51 def CheckShiftROR : CheckImmOperand_s<3, "AArch64_AM::ROR">;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 53 ROR, ///< Bit rotate right. enumerator
|
| H A D | AVRISelLowering.cpp | 257 NODE(ROR); in getTargetNodeName()
382 Opc8 = AVRISD::ROR; in LowerShifts()
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| /openbsd-src/gnu/llvm/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMUtils.h | 182 static inline uint32_t ROR(const uint32_t value, const uint32_t amount, in ROR() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 613 ROR, enumerator
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| /openbsd-src/gnu/llvm/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.cpp | 1755 R[t] = ROR(data, 8*UInt(address<1:0>)); in EmulateLDRRtPCRelative()
6340 R[t] = ROR(data, 8*UInt(address<1:0>)); in EmulateLDRImmediateARM()
6445 data = ROR(data, Bits32(address, 1, 0), &success); in EmulateLDRImmediateARM()
6478 R[t] = ROR(data, 8*UInt(address<1:0>)); in EmulateLDRRegister()
6650 data = ROR(data, Bits32(address, 1, 0), &success); in EmulateLDRRegister()
8326 rotated = ROR(R[m], rotation); in EmulateSXTB()
8381 uint64_t rotated = ROR(Rm, rotation, &success); in EmulateSXTB()
8411 rotated = ROR(R[m], rotation); in EmulateSXTH()
8466 uint64_t rotated = ROR(Rm, rotation, &success); in EmulateSXTH()
8496 rotated = ROR(R[m], rotation); in EmulateUXTB()
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoZb.td | 345 def ROR : ALU_rr<0b0110000, 0b101, "ror">,
532 def : PatGprGpr<shiftop<rotr>, ROR>;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86SchedSandyBridge.td | 993 "ROR(8|16|32|64)m(1|i)")>;
1031 "ROR(8|16|32|64)mCL",
|
| H A D | X86ScheduleZnver4.td | 1590 "(V?)P(ROL|ROR)(D|Q|VD|VQ)(Z?|Z128?|Z256?)(rr|rrk|rrkz)",
1591 "(V?)P(ROL|ROR)(D|Q|VD|VQ)(Z256?)(ri|rik|rikz)",
1592 "(V?)P(ROL|ROR)(D|Q)(Z?|Z128?)(ri|rik|rikz)",
|
| H A D | X86SchedSkylakeClient.td | 1145 "ROR(8|16|32|64)m(1|i)")>;
1228 "ROR(8|16|32|64)mCL",
|
| H A D | X86SchedBroadwell.td | 1089 "ROR(8|16|32|64)m(1|i)")>;
1163 "ROR(8|16|32|64)mCL",
|
| H A D | X86SchedHaswell.td | 1192 "ROR(8|16|32|64)m(1|i)")>;
1323 "ROR(8|16|32|64)mCL",
|
| H A D | X86ScheduleAtom.td | 514 def : InstRW<[AtomWrite0_1], (instregex "(RCL|RCR|ROL|ROR|SAR|SHL|SHR)(8|16|32|64)m",
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 338 def : InstRW<[WriteALUsi], (instregex "(t|t2)(LSL|LSR|ASR|ROR)")>;
|
| H A D | ARMScheduleSwift.td | 154 // ASR,LSL,ROR,RRX
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1462 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || in isShifter()
1568 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && in isLogicalShifter()
3567 .Case("ror", AArch64_AM::ROR) in tryParseOptionalShiftExtend()
3589 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend()
|