Searched refs:RC0 (Results 1 – 4 of 4) sorted by relevance
234 const TargetRegisterClass *RC0 = MRI->getRegClass(Reg0); in runOnMachineFunction() local235 if (RC0->getID() == Hexagon::PredRegsRegClassID) { in runOnMachineFunction()
809 const TargetRegisterClass *RC0 = MRI->getRegClass(PHIRes); in processPHINode() local810 if (HasUses && AllAGPRUses && !TRI->isAGPRClass(RC0)) { in processPHINode()812 MRI->setRegClass(PHIRes, TRI->getEquivalentAGPRClass(RC0)); in processPHINode()821 RC0 == &AMDGPU::VReg_1RegClass) { in processPHINode()
432 Jesse 5.12.0-RC0 2010-Mar-21489 Ricardo 5.16.0-RC0 2012-May-10697 Sawyer X 5.32.0-RC0 2020-May-30 The 5.32 maintenance track
1245 const TargetRegisterClass &RC0 = *MRI->getRegClass(Reg0); in allocateInstruction() local1250 unsigned ClassSize0 = RegClassInfo.getOrder(&RC0).size(); in allocateInstruction()1253 bool SmallClass0 = ClassSize0 < RegClassDefCounts[RC0.getID()]; in allocateInstruction()