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Searched refs:Qd (Results 1 – 13 of 13) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrMVE.td1406 : MVE_p<(outs MQPR:$Qd), (ins MQPR:$Qn, MQPR:$Qm), itin, iname, suffix,
1407 "$Qd, $Qn, $Qm", vpred_r, cstr, vecsize, pattern> {
1408 bits<4> Qd;
1412 let Inst{22} = Qd{3};
1415 let Inst{15-13} = Qd{2-0};
1506 bits<4> Qd;
1509 let Inst{22} = Qd{3};
1510 let Inst{15-13} = Qd{2-0};
1515 def MVE_VBIC : MVE_bit_arith<(outs MQPR:$Qd), (ins MQPR:$Qn, MQPR:$Qm),
1516 "vbic", "", "$Qd, $Qn, $Qm", "", 0b00> {
[all …]
H A DARMInstrCDE.td278 iname#"${vp}\t$coproc, $Qd, $imm", params.Cstr, params.Vpred> {
280 bits<3> Qd;
287 let Inst{15-13} = Qd{2-0};
333 iname#"${vp}\t$coproc, $Qd, $Qm, $imm", params.Cstr,
336 bits<3> Qd;
344 let Inst{15-13} = Qd{2-0};
400 iname#"${vp}\t$coproc, $Qd, $Qn, $Qm, $imm", params.Cstr,
403 bits<3> Qd;
413 let Inst{15-13} = Qd{2-0};
481 let Rd = (outs regclass:$Qd);
[all …]
H A DARMInstrNEON.td6911 def : NEONInstAlias<"vcvt${p}.s32.f32 $Qd, $Qm, #0",
6912 (VCVTf2sq QPR:$Qd, QPR:$Qm, pred:$p)>;
6913 def : NEONInstAlias<"vcvt${p}.u32.f32 $Qd, $Qm, #0",
6914 (VCVTf2uq QPR:$Qd, QPR:$Qm, pred:$p)>;
6915 def : NEONInstAlias<"vcvt${p}.f32.s32 $Qd, $Qm, #0",
6916 (VCVTs2fq QPR:$Qd, QPR:$Qm, pred:$p)>;
6917 def : NEONInstAlias<"vcvt${p}.f32.u32 $Qd, $Qm, #0",
6918 (VCVTu2fq QPR:$Qd, QPR:$Qm, pred:$p)>;
6929 def : NEONInstAlias<"vcvt${p}.s16.f16 $Qd, $Qm, #0",
6930 (VCVTh2sq QPR:$Qd, QPR:$Qm, pred:$p)>;
[all …]
H A DARMInstrFormats.td241 // instructions that both read and write their Qd register even when
262 // (which by convention will be called $Qd).
270 let vpred_constraint = ",$Qd = $vp.inactive";
/openbsd-src/regress/lib/libcrypto/x509/bettertls/certificates/
H A D3363.crt14 yIbnRl9abNGD+FS1pAE+X8VkPCP32eYYpD6XOA3hgy7U9aayW/drniZeVcdOZ+Qd
H A D3157.crt14 Qd/EsQ+ljH8wmcsXqbyUirxh/ErmzciZf7BLzVV5ny+yh6b/DAcuXIcePOgavBko
H A D2550.key24 Qd+hAoGBALaro5Z5IGqNtmah2aROIfQHUwGXnpPDjHiHPlGUleyp5R3MKb3vHpV9
H A D927.chain12 Qd+voZ52WbXj4gGuB86+cYIT4zwZGhvhip1bietMbv2xrN7QKWmK9qo4smNHHVwu
H A D2236.chain44 WCG05aLUsY2yw/Qd/P6WZpc0pXgBT3FdhYaWk5fEiTKskG/9TCBblEkXMWRH9/+L
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonPseudo.td484 def PS_vloadrq_ai: Pseudo<(outs HvxQR:$Qd),
502 def PS_qtrue: InstHexagon<(outs HvxQR:$Qd), (ins), "", [], "",
504 def PS_qfalse: InstHexagon<(outs HvxQR:$Qd), (ins), "", [], "",
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp3797 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) | in DecodeMVEModImmInstruction() local
3809 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEModImmInstruction()
3826 unsigned Qd = fieldFromInstruction(Insn, 13, 3); in DecodeMVEVADCInstruction() local
3827 Qd |= fieldFromInstruction(Insn, 22, 1) << 3; in DecodeMVEVADCInstruction()
3828 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVADCInstruction()
3842 Inst.addOperand(MCOperand::createImm(Qd)); in DecodeMVEVADCInstruction()
6724 unsigned Qd = fieldFromInstruction(Val, 13, 3); in DecodeMVE_MEM_pre() local
6730 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVE_MEM_pre()
6798 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) | in DecodeMVEVMOVQtoDReg() local
6806 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVMOVQtoDReg()
[all …]
/openbsd-src/gnu/llvm/clang/include/clang/Basic/
H A Darm_neon.td787 def VMUL_N_A64 : IOpInst<"vmul_n", "..1", "Qd", OP_MUL_N>;
842 def VCVT_F32_F64 : SInst<"vcvt_f32_f64", "(<q).", "Qd">;
1063 def VMUL_LANE_A64 : IOpInst<"vmul_lane", "..qI", "Qd", OP_MUL_LN>;
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp7903 const unsigned Qd = MRI->getEncodingValue(Inst.getOperand(QdIdx).getReg()); in validateInstruction() local
7906 if (Qd == Qm) { in validateInstruction()