| /openbsd-src/lib/libm/src/ld128/ |
| H A D | s_log1pl.c | 83 Q9 = 9.147150349299596453976674231612674085381E3L, variable
231 + Q9) * x in log1pl()
|
| /openbsd-src/regress/lib/libcrypto/x509/bettertls/certificates/ |
| H A D | 3230.crt | 14 Q9+9ICT9SvQoZo3bifvtrXBAhR17Z7J5PJ3jaaGVY1EMuIn/VHqmA+h6FI8N/xu3
|
| H A D | 3084.key | 13 1Q9/vqECgYEAvdJvMUMcXYd5WqgluAltjMNolh4wZVAz86PIIH1jkOwEM5rePley
|
| H A D | 2044.key | 17 gXNJDem2qajvwcxC2+L5fk+wQwlZxSivQJhKOOHnbYVdaaM7c98wVpq25VT8Z+Q9
|
| H A D | 1901.key | 22 poHeaNRZCCb6du9q6i5/wbCGDPClXu8uY1ZKi64TroKTSCIRXmvs4wNGV0JzO+Q9
|
| H A D | 3275.key | 14 DWyZxv/4eaOD3qRBlqip8onVQdQaNXBO8CuMlU6BOwi27nbW4f2wuWUE4lBE+9Q9
|
| H A D | 2347.key | 19 jOY103qtHmJu67wmuMwdyyPHFbQRwU61fwdTFRwm7zwwNU8sR9e+8koSk8WEw/Q9
|
| H A D | 1484.key | 13 k6/mOdUCgYEA/AwdjBgOsaXIxwNZZR6JPZo9ZupP83rg2eNANT2kHNVm/SL7++Q9
|
| /openbsd-src/gnu/usr.bin/gcc/contrib/ |
| H A D | paranoia.cc | 986 FLOAT Q, Q9; member
2545 Q9 = (Z + Z) / Z; in TstPtUf()
2546 printf ("What the machine gets for (Z + Z) / Z is %s .\n", Q9.str()); in TstPtUf()
2547 if (FABS (Q9 - Two) < Radix * U2) in TstPtUf()
2554 if ((Q9 < One) || (Q9 > Two)) in TstPtUf()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64PBQPRegAlloc.cpp | 83 case AArch64::Q9: in isOdd()
|
| H A D | AArch64RegisterInfo.td | 413 def Q9 : AArch64Reg<9, "q9", [D9], ["v9", ""]>, DwarfRegAlias<B9>;
834 def Z9 : AArch64Reg<9, "z9", [Q9, Z9_HI]>, DwarfRegNum<[105]>;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 92 SP::Q1, SP::Q9, ~0U, ~0U,
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.cpp | 322 {codeview::RegisterId::ARM_NQ9, ARM::Q9}, in initLLVMToCVRegMapping()
|
| H A D | ARMMCCodeEmitter.cpp | 573 case ARM::Q8: case ARM::Q9: case ARM::Q10: case ARM::Q11: in getMachineOpValue()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 211 {codeview::RegisterId::ARM64_Q9, AArch64::Q9}, in initLLVMToCVRegMapping()
|
| H A D | AArch64InstPrinter.cpp | 1500 case AArch64::Q8: Reg = AArch64::Q9; break; in getNextVectorRegister()
1501 case AArch64::Q9: Reg = AArch64::Q10; break; in getNextVectorRegister()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 279 def Q9 : Rq< 5, "F36", [D18, D19]>;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 94 VE::Q8, VE::Q9, VE::Q10, VE::Q11, VE::Q12, VE::Q13, VE::Q14, VE::Q15,
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 177 Sparc::Q8, Sparc::Q9, Sparc::Q10, Sparc::Q11,
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterInfo.td | 170 def Q9 : ARMReg< 9, "q9", [D18, D19]>;
|
| H A D | ARMInstrThumb2.td | 3825 Q0, Q1, Q2, Q3, Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15],
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 128 VE::Q8, VE::Q9, VE::Q10, VE::Q11, VE::Q12, VE::Q13, VE::Q14, VE::Q15,
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1571 ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11,
1591 ARM::Q9, ARM::D19_D20, ARM::Q10, ARM::D21_D22, ARM::Q11, ARM::D23_D24,
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 2553 .Case("v9", AArch64::Q9) in MatchNeonVectorRegName()
|
| /openbsd-src/lib/libcrypto/ |
| H A D | cert.pem | 923 znfSxqxx4VyjHQy7Ct9f4qNx2No3WqB4K/TUfet27fJhcKVlmtOJNBir+3I+17Q9
|