Searched refs:PrefReg (Results 1 – 5 of 5) sorted by relevance
792 void setRegAllocationHint(Register VReg, unsigned Type, Register PrefReg) { in setRegAllocationHint() argument796 RegAllocHints[VReg].second.push_back(PrefReg); in setRegAllocationHint()801 void addRegAllocationHint(Register VReg, Register PrefReg) { in addRegAllocationHint() argument803 RegAllocHints[VReg].second.push_back(PrefReg); in addRegAllocationHint()808 void setSimpleHint(Register VReg, Register PrefReg) { in setSimpleHint() argument809 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
82 PrefReg, ///< Block entry/exit prefers a register. enumerator
138 case PrefReg: in addBias()381 case PrefReg: return "PrefReg"; in print()
610 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()613 ? SpillPlacement::PrefReg in addSplitConstraints()861 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()863 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()
285 for (Register PrefReg : Hints.second) in cloneMF() local286 DstMRI->addRegAllocationHint(NewReg, PrefReg); in cloneMF()