Home
last modified time | relevance | path

Searched refs:PTEST (Results 1 – 9 of 9) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h338 PTEST, enumerator
H A DAArch64SchedA64FX.td2096 "^PFIRST", "^PTEST", "^PTRUES?", "^PUNPK(HI|LO)",
H A DAArch64SVEInstrInfo.td327 def AArch64ptest : SDNode<"AArch64ISD::PTEST", SDT_AArch64PTest>;
H A DAArch64ISelLowering.cpp2511 MAKE_CASE(AArch64ISD::PTEST) in getTargetNodeName()
17916 Cond == AArch64CC::ANY_ACTIVE ? AArch64ISD::PTEST_ANY : AArch64ISD::PTEST, in getPTest()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86ISelLowering.h423 PTEST, enumerator
H A DX86ScheduleZnver4.td1678 "(V?)PTEST(N?)(MB|MD|MQ|MW)(Z128?)(rrk)"
1687 "(V?)PTEST(N?)(MB|MD|MQ|MW)(Z256?)(rr|rrk)"
1696 "(V?)PTEST(N?)(MB|MD|MQ|MW)(Z?)(rrk)"
H A DX86InstrFragmentsSIMD.td290 def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
H A DX86.td628 "Prefer AVX512 mask registers over PTEST/MOVMSK">;
H A DX86ISelLowering.cpp23956 return DAG.getNode(X86ISD::PTEST, DL, MVT::i32, V, V); in LowerVectorAllZero()
27642 unsigned TestOpc = X86ISD::PTEST; in LowerINTRINSIC_WO_CHAIN()
34574 NODE_NAME_CASE(PTEST) in getTargetNodeName()
46606 if (EFLAGS.getOpcode() != X86ISD::PTEST && in combinePTESTCC()
46851 return DAG.getNode(X86ISD::PTEST, SDLoc(EFLAGS), MVT::i32, V, V); in combineSetCCMOVMSK()
46866 return DAG.getNode(X86ISD::PTEST, SDLoc(EFLAGS), MVT::i32, V, V); in combineSetCCMOVMSK()
46906 return DAG.getNode(X86ISD::PTEST, SDLoc(EFLAGS), MVT::i32, V, V); in combineSetCCMOVMSK()
53393 SDValue PT = DAG.getNode(X86ISD::PTEST, DL, MVT::i32, BCCmp, BCCmp); in combineVectorSizedSetCCEquality()