Searched refs:OutputRegs (Results 1 – 1 of 1) sorted by relevance
3718 SmallVector<SmallVector<Register, 8>, 2> OutputRegs(NumDefs); in fewerElementsVectorMultiEltType() local3756 OutputRegs[DstNo].push_back(I.getReg(DstNo)); in fewerElementsVectorMultiEltType()3762 mergeMixedSubvectors(MI.getReg(i), OutputRegs[i]); in fewerElementsVectorMultiEltType()3765 MIRBuilder.buildMergeLikeInstr(MI.getReg(i), OutputRegs[i]); in fewerElementsVectorMultiEltType()3781 SmallVector<Register, 8> OutputRegs; in fewerElementsVectorPhi() local3801 OutputRegs.push_back(Phi.getReg(0)); in fewerElementsVectorPhi()3811 mergeMixedSubvectors(MI.getReg(0), OutputRegs); in fewerElementsVectorPhi()3813 MIRBuilder.buildMergeLikeInstr(MI.getReg(0), OutputRegs); in fewerElementsVectorPhi()