Searched refs:OpOpcode (Results 1 – 3 of 3) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 5363 unsigned OpOpcode = Operand.getNode()->getOpcode(); in getNode() local
5368 assert(OpOpcode == ISD::TargetConstant && in getNode()
5427 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) in getNode()
5428 return getNode(OpOpcode, DL, VT, Operand.getOperand(0)); in getNode()
5429 if (OpOpcode == ISD::UNDEF) in getNode()
5446 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) in getNode()
5448 if (OpOpcode == ISD::UNDEF) in getNode()
5466 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || in getNode()
5467 OpOpcode == ISD::ANY_EXTEND) in getNode()
5469 return getNode(OpOpcode, DL, VT, Operand.getOperand(0)); in getNode()
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2814 unsigned OpOpcode = Op.getOpcode(); in LowerFP_TO_INT() local
2826 SDValue FpToInt32 = DAG.getNode(OpOpcode, DL, MVT::i32, Src); in LowerFP_TO_INT()
2834 SDValue FpToInt32 = DAG.getNode(OpOpcode, DL, MVT::i32, Src); in LowerFP_TO_INT()
2836 OpOpcode == ISD::FP_TO_SINT ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerFP_TO_INT()
2841 return LowerFP_TO_INT64(Op, DAG, OpOpcode == ISD::FP_TO_SINT); in LowerFP_TO_INT()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 16873 unsigned OpOpcode = Op.getNode()->getOpcode(); in PerformVDIVCombine() local
16875 (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP)) in PerformVDIVCombine()
16902 bool isSigned = OpOpcode == ISD::SINT_TO_FP; in PerformVDIVCombine()
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