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Searched refs:Op3Val (Results 1 – 4 of 4) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.td376 multiclass F3_12<string OpcStr, bits<6> Op3Val, SDNode OpNode,
379 def rr : F3_1<2, Op3Val,
384 def ri : F3_2<2, Op3Val,
393 multiclass F3_12np<string OpcStr, bits<6> Op3Val, InstrItinClass itin = IIC_iu_instr> {
394 def rr : F3_1<2, Op3Val,
398 def ri : F3_2<2, Op3Val,
405 multiclass Load<string OpcStr, bits<6> Op3Val, SDPatternOperator OpNode,
407 def rr : F3_1<3, Op3Val,
412 def ri : F3_2<3, Op3Val,
421 class LoadASI<string OpcStr, bits<6> Op3Val, RegisterClass RC> :
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H A DSparcInstrFormats.td226 multiclass F3_S<string OpcStr, bits<6> Op3Val, bit XVal, SDNode OpNode,
229 def rr : F3_Sr<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs1, IntRegs:$rs2),
233 def ri : F3_Si<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs1, SIT:$shcnt),
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp6157 uint64_t Op3Val = Op3CE->getValue(); in MatchAndEmitInstruction() local
6162 NewOp3Val = (32 - Op3Val) & 0x1f; in MatchAndEmitInstruction()
6163 NewOp4Val = 31 - Op3Val; in MatchAndEmitInstruction()
6165 NewOp3Val = (64 - Op3Val) & 0x3f; in MatchAndEmitInstruction()
6166 NewOp4Val = 63 - Op3Val; in MatchAndEmitInstruction()
6247 uint64_t Op3Val = Op3CE->getValue(); in MatchAndEmitInstruction() local
6257 if (Op3Val >= RegWidth) in MatchAndEmitInstruction()
6266 NewOp3Val = (32 - Op3Val) & 0x1f; in MatchAndEmitInstruction()
6268 NewOp3Val = (64 - Op3Val) & 0x3f; in MatchAndEmitInstruction()
6311 uint64_t Op3Val = Op3CE->getValue(); in MatchAndEmitInstruction() local
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/openbsd-src/gnu/llvm/llvm/docs/
H A DWritingAnLLVMBackend.rst806 multiclass F3_12 <string OpcStr, bits<6> Op3Val, SDNode OpNode> {
807 def rr : F3_1 <2, Op3Val,
811 def ri : F3_2 <2, Op3Val,