| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 377 int32_t OffImm = (int32_t)MO1.getImm(); in printThumbLdrLabelOperand() local
378 bool isSub = OffImm < 0; in printThumbLdrLabelOperand()
381 if (OffImm == INT32_MIN) in printThumbLdrLabelOperand()
382 OffImm = 0; in printThumbLdrLabelOperand()
384 O << markup("<imm:") << "#-" << formatImm(-OffImm) << markup(">"); in printThumbLdrLabelOperand()
386 O << markup("<imm:") << "#" << formatImm(OffImm) << markup(">"); in printThumbLdrLabelOperand()
1044 int32_t OffImm = (int32_t)MO.getImm() << scale; in printAdrLabelOperand() local
1047 if (OffImm == INT32_MIN) in printAdrLabelOperand()
1049 else if (OffImm < 0) in printAdrLabelOperand()
1050 O << "#-" << -OffImm; in printAdrLabelOperand()
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| H A D | ARMMCTargetDesc.cpp | 453 int32_t OffImm = (int32_t)MO2.getImm(); in evaluateMemOpAddrForAddrMode_i12() local
455 if (OffImm == INT32_MIN) in evaluateMemOpAddrForAddrMode_i12()
456 OffImm = 0; in evaluateMemOpAddrForAddrMode_i12()
457 return Addr + OffImm; in evaluateMemOpAddrForAddrMode_i12()
530 int32_t OffImm = (int32_t)MO2.getImm(); in evaluateMemOpAddrForAddrModeT2_i8s4() local
531 assert(((OffImm & 0x3) == 0) && "Not a valid immediate!"); in evaluateMemOpAddrForAddrModeT2_i8s4()
534 if (OffImm == INT32_MIN) in evaluateMemOpAddrForAddrModeT2_i8s4()
535 OffImm = 0; in evaluateMemOpAddrForAddrModeT2_i8s4()
536 return Addr + OffImm; in evaluateMemOpAddrForAddrModeT2_i8s4()
547 int32_t OffImm = (int32_t)MO1.getImm(); in evaluateMemOpAddrForAddrModeT2_pc() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 83 bool SelectAddrModeIndexed7S8(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S8() argument
84 return SelectAddrModeIndexed7S(N, 1, Base, OffImm); in SelectAddrModeIndexed7S8()
86 bool SelectAddrModeIndexed7S16(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S16() argument
87 return SelectAddrModeIndexed7S(N, 2, Base, OffImm); in SelectAddrModeIndexed7S16()
89 bool SelectAddrModeIndexed7S32(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S32() argument
90 return SelectAddrModeIndexed7S(N, 4, Base, OffImm); in SelectAddrModeIndexed7S32()
92 bool SelectAddrModeIndexed7S64(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S64() argument
93 return SelectAddrModeIndexed7S(N, 8, Base, OffImm); in SelectAddrModeIndexed7S64()
95 bool SelectAddrModeIndexed7S128(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S128() argument
96 return SelectAddrModeIndexed7S(N, 16, Base, OffImm); in SelectAddrModeIndexed7S128()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 115 bool SelectAddrModeImm12(SDValue N, SDValue &Base, SDValue &OffImm);
148 SDValue &OffImm);
150 SDValue &OffImm);
152 SDValue &OffImm);
154 SDValue &OffImm);
155 bool SelectThumbAddrModeSP(SDValue N, SDValue &Base, SDValue &OffImm);
157 bool SelectTAddrModeImm7(SDValue N, SDValue &Base, SDValue &OffImm);
160 bool SelectT2AddrModeImm12(SDValue N, SDValue &Base, SDValue &OffImm);
162 bool SelectT2AddrModeImm8(SDValue N, SDValue &Base, SDValue &OffImm);
164 SDValue &OffImm);
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| H A D | ARMLoadStoreOptimizer.cpp | 1799 int OffImm = getMemoryOpOffset(*MI); in FixInvalidRegPairOp() local
1803 if (OddRegNum > EvenRegNum && OffImm == 0) { in FixInvalidRegPairOp()
1831 ? (isT2 ? (OffImm < 0 ? ARM::t2LDRi8 : ARM::t2LDRi12) : ARM::LDRi12) in FixInvalidRegPairOp()
1832 : (isT2 ? (OffImm < 0 ? ARM::t2STRi8 : ARM::t2STRi12) : ARM::STRi12); in FixInvalidRegPairOp()
1836 ? (isT2 ? (OffImm+4 < 0 ? ARM::t2LDRi8 : ARM::t2LDRi12) : ARM::LDRi12) in FixInvalidRegPairOp()
1837 : (isT2 ? (OffImm+4 < 0 ? ARM::t2STRi8 : ARM::t2STRi12) : ARM::STRi12); in FixInvalidRegPairOp()
1842 InsertLDR_STR(MBB, MBBI, OffImm + 4, isLd, NewOpc2, OddReg, OddDeadKill, in FixInvalidRegPairOp()
1844 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill, in FixInvalidRegPairOp()
1858 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill, in FixInvalidRegPairOp()
1861 InsertLDR_STR(MBB, MBBI, OffImm + 4, isLd, NewOpc2, OddReg, OddDeadKill, in FixInvalidRegPairOp()
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| H A D | ARMBaseInstrInfo.cpp | 216 unsigned OffImm = MI.getOperand(NumOps - 2).getImm(); in convertToThreeAddress() local
221 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; in convertToThreeAddress()
222 unsigned Amt = ARM_AM::getAM2Offset(OffImm); in convertToThreeAddress()
235 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm); in convertToThreeAddress()
255 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; in convertToThreeAddress()
256 unsigned Amt = ARM_AM::getAM3Offset(OffImm); in convertToThreeAddress()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 6442 MachineOperand &OffImm = RootDef->getOperand(2); in selectAddrModeUnscaled() local
6443 if (!OffImm.isReg()) in selectAddrModeUnscaled()
6445 MachineInstr *RHS = MRI.getVRegDef(OffImm.getReg()); in selectAddrModeUnscaled()
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