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Searched refs:NumSubElts (Results 1 – 13 of 13) sorted by relevance

/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h133 int NumSubElts = SubVTy->getNumElements(); in getExtractSubvectorOverhead() local
135 (Index + NumSubElts) <= in getExtractSubvectorOverhead()
143 for (int i = 0; i != NumSubElts; ++i) { in getExtractSubvectorOverhead()
161 int NumSubElts = SubVTy->getNumElements(); in getInsertSubvectorOverhead() local
163 (Index + NumSubElts) <= in getInsertSubvectorOverhead()
171 for (int i = 0; i != NumSubElts; ++i) { in getInsertSubvectorOverhead()
1346 unsigned NumSubElts = NumElts / Factor; variable
1347 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1390 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1402 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
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/openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h1194 int NumSubElts, SubIndex; in getInstructionCost() local
1206 if (Shuffle->isInsertSubvectorMask(NumSubElts, SubIndex)) in getInstructionCost()
1210 FixedVectorType::get(VecTy->getScalarType(), NumSubElts), in getInstructionCost()
1257 if (Shuffle->isInsertSubvectorMask(NumSubElts, SubIndex)) in getInstructionCost()
1260 SubIndex, FixedVectorType::get(VecTy->getScalarType(), NumSubElts), in getInstructionCost()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp854 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in SimplifyMultipleUseDemandedBits() local
855 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in SimplifyMultipleUseDemandedBits()
1213 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in SimplifyDemandedBits() local
1214 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in SimplifyDemandedBits()
1216 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in SimplifyDemandedBits()
1284 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedBits() local
1287 DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedBits()
1380 unsigned NumSubElts = in SimplifyDemandedBits() local
1384 APInt::getBitsSet(NumElts, SubIdx, SubIdx + NumSubElts); in SimplifyDemandedBits()
3033 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedVectorElts() local
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H A DSelectionDAG.cpp3073 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in computeKnownBits() local
3074 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in computeKnownBits()
3076 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in computeKnownBits()
4473 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in ComputeNumSignBits() local
4474 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in ComputeNumSignBits()
4476 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in ComputeNumSignBits()
11312 auto PartialReduction = [&](SDValue Op, unsigned NumSubElts) { in matchBinOpReduction() argument
11317 EVT SubVT = EVT::getVectorVT(*getContext(), OpSVT, NumSubElts); in matchBinOpReduction()
H A DDAGCombiner.cpp24017 int NumSubElts = SubVT.getVectorNumElements(); in visitVECTOR_SHUFFLE() local
24018 assert((NumElts % NumSubElts) == 0 && "Subvector mismatch"); in visitVECTOR_SHUFFLE()
24030 for (int SubIdx = 0; SubIdx != (int)NumElts; SubIdx += NumSubElts) { in visitVECTOR_SHUFFLE()
24036 InsertionMask.begin() + SubIdx + NumSubElts, in visitVECTOR_SHUFFLE()
24037 NumElts + (SubVec * NumSubElts)); in visitVECTOR_SHUFFLE()
24845 int NumSubElts = NumElts * Split; in XformToShuffleWithZero() local
24849 for (int i = 0; i != NumSubElts; ++i) { in XformToShuffleWithZero()
24856 Indices.push_back(i + NumSubElts); in XformToShuffleWithZero()
24877 Indices.push_back(i + NumSubElts); in XformToShuffleWithZero()
24884 EVT ClearVT = EVT::getVectorVT(*DAG.getContext(), ClearSVT, NumSubElts); in XformToShuffleWithZero()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp265 for (unsigned i = 0, NumSubElts = 64 / BitWidth; i != NumSubElts; ++i) { in simplifyX86immShift() local
266 unsigned SubEltIdx = (NumSubElts - 1) - i; in simplifyX86immShift()
H A DX86TargetTransformInfo.cpp1467 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost() local
1468 if ((Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0) in getShuffleCost()
1477 if (NumSubElts > OrigSubElts && (Index % OrigSubElts) == 0 && in getShuffleCost()
1478 (NumSubElts % OrigSubElts) == 0 && in getShuffleCost()
1483 assert(NumElts >= NumSubElts && NumElts > OrigSubElts && in getShuffleCost()
1489 int ExtractIndex = alignDown((Index % NumElts), NumSubElts); in getShuffleCost()
1514 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost() local
1515 if ((Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0) in getShuffleCost()
H A DX86ISelLowering.cpp6775 unsigned NumSubElts = OpVT.getVectorNumElements() / NumSubs; in SplitOpsAndApply() local
6777 SubOps.push_back(extractSubVector(Op, i * NumSubElts, DAG, DL, SizeSub)); in SplitOpsAndApply()
7460 unsigned NumSubElts = SubVecSizeInBits / CstEltSizeInBits; in getTargetConstantBitsFromNode() local
7462 APInt UndefSubElts(NumSubElts, 0); in getTargetConstantBitsFromNode()
7463 SmallVector<APInt, 64> SubEltBits(NumSubElts * NumSubVecs, in getTargetConstantBitsFromNode()
7465 for (unsigned i = 0; i != NumSubElts; ++i) { in getTargetConstantBitsFromNode()
7470 SubEltBits[i + (j * NumSubElts)] = SubEltBits[i]; in getTargetConstantBitsFromNode()
7529 unsigned NumSubElts = VT.getVectorNumElements(); in getTargetConstantBitsFromNode() local
7531 UndefElts = UndefElts.extractBits(NumSubElts, BaseIdx); in getTargetConstantBitsFromNode()
7532 if ((BaseIdx + NumSubElts) != NumSrcElts) in getTargetConstantBitsFromNode()
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/openbsd-src/gnu/llvm/llvm/include/llvm/IR/
H A DInstructions.h2359 int &NumSubElts, int &Index);
2361 int &NumSubElts, int &Index) {
2369 return isInsertSubvectorMask(MaskAsInts, NumSrcElts, NumSubElts, Index);
2373 bool isInsertSubvectorMask(int &NumSubElts, int &Index) const {
2381 return isInsertSubvectorMask(ShuffleMask, NumSrcElts, NumSubElts, Index);
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp3351 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost() local
3352 if ((Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0) in getShuffleCost()
H A DAArch64ISelLowering.cpp16856 unsigned NumSubElts = SubVT.getVectorNumElements(); in performInsertSubvectorCombine() local
16858 (IdxVal != 0 && IdxVal != NumSubElts)) in performInsertSubvectorCombine()
16868 DAG.getVectorIdxConstant(NumSubElts, DL)); in performInsertSubvectorCombine()
/openbsd-src/gnu/llvm/llvm/lib/IR/
H A DInstructions.cpp2464 int NumSrcElts, int &NumSubElts, in isInsertSubvectorMask() argument
2515 NumSubElts = NumSub1Elts; in isInsertSubvectorMask()
2527 NumSubElts = NumSub0Elts; in isInsertSubvectorMask()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp15535 unsigned NumSubElts = SubVT.getVectorNumElements(); in PerformInsertSubvectorCombine() local
15537 (IdxVal != 0 && IdxVal != NumSubElts)) in PerformInsertSubvectorCombine()
15548 DCI.DAG.getVectorIdxConstant(NumSubElts, DL)); in PerformInsertSubvectorCombine()