| /openbsd-src/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 142 BinaryOperator *NewShift = BinaryOperator::Create(ShiftOpcode, X, NewShAmt); in reassociateShiftAmtsOfTwoSameDirectionShifts() local
149 NewShift->setHasNoUnsignedWrap(Sh0->hasNoUnsignedWrap() && in reassociateShiftAmtsOfTwoSameDirectionShifts()
151 NewShift->setHasNoSignedWrap(Sh0->hasNoSignedWrap() && in reassociateShiftAmtsOfTwoSameDirectionShifts()
154 NewShift->setIsExact(Sh0->isExact() && Sh1->isExact()); in reassociateShiftAmtsOfTwoSameDirectionShifts()
158 Instruction *Ret = NewShift; in reassociateShiftAmtsOfTwoSameDirectionShifts()
160 Builder.Insert(NewShift); in reassociateShiftAmtsOfTwoSameDirectionShifts()
161 Ret = CastInst::Create(Instruction::Trunc, NewShift, Sh0->getType()); in reassociateShiftAmtsOfTwoSameDirectionShifts()
316 auto *NewShift = BinaryOperator::Create(OuterShift->getOpcode(), X, in dropRedundantMaskingOfLeftShiftInput() local
319 return NewShift; in dropRedundantMaskingOfLeftShiftInput()
321 Builder.Insert(NewShift); in dropRedundantMaskingOfLeftShiftInput()
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| H A D | InstCombineCompares.cpp | 1679 Value *NewShift = in foldICmpAndShift() local
1684 Value *NewAnd = Builder.CreateAnd(Shift->getOperand(0), NewShift); in foldICmpAndShift()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3221 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt); in performShlCombine() local
3225 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {Zero, NewShift}); in performShlCombine()
3245 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, in performSraCombine() local
3248 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift}); in performSraCombine()
3255 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, in performSraCombine() local
3257 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift}); in performSraCombine()
3305 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst); in performSrlCombine() local
3307 SDValue BuildPair = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, Zero}); in performSrlCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2361 Register NewShift = in applyCombineTruncOfShift() local
2367 replaceRegWith(MRI, Dst, NewShift); in applyCombineTruncOfShift()
2369 Builder.buildTrunc(Dst, NewShift); in applyCombineTruncOfShift()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2003 SDValue NewShift = DAG.getNode(ISD::SHL, DL, VT, NewAnd, Shift.getOperand(1)); in foldMaskedShiftToScaledMask() local
2012 insertDAGNode(DAG, N, NewShift); in foldMaskedShiftToScaledMask()
2013 DAG.ReplaceAllUsesWith(N, NewShift); in foldMaskedShiftToScaledMask()
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| H A D | X86ISelLowering.cpp | 42810 SDValue NewShift = TLO.DAG.getNode( in SimplifyDemandedBitsForTargetNode() local
42813 return TLO.CombineTo(Op, NewShift); in SimplifyDemandedBitsForTargetNode()
47926 SDValue NewShift = DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0), N1); in combineShiftRightLogical() local
47927 return DAG.getNode(ISD::AND, DL, VT, NewShift, NewMask); in combineShiftRightLogical()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2406 SDValue NewShift = DAG.getNode(IsAdd ? ISD::SRA : ISD::SRL, DL, VT, in foldAddSubOfSignBit() local
2408 return DAG.getNode(ISD::ADD, DL, VT, NewShift, NewC); in foldAddSubOfSignBit()
6220 SDValue NewShift = DAG.getNode(ShiftOpcode, DL, VT, LogicX, Y); in foldLogicOfShifts() local
6221 return DAG.getNode(LogicOpcode, DL, VT, NewShift, Z); in foldLogicOfShifts()
9020 SDValue NewShift = DAG.getNode(N->getOpcode(), DL, VT, LHS.getOperand(0), in visitShiftByConstant() local
9022 return DAG.getNode(LHS.getOpcode(), DL, VT, NewShift, NewRHS); in visitShiftByConstant()
9805 SDValue NewShift = DAG.getNode(ISD::SRL, DL, InnerShiftVT, in visitSRL() local
9807 return DAG.getNode(ISD::TRUNCATE, DL, VT, NewShift); in visitSRL()
9815 SDValue NewShift = DAG.getNode(ISD::SRL, DL, InnerShiftVT, in visitSRL() local
9820 SDValue And = DAG.getNode(ISD::AND, DL, InnerShiftVT, NewShift, Mask); in visitSRL()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 17248 SDValue NewShift = DAG.getNode(NewOpcode, DL, N->getVTList(), Op0, Op1, in PerformLongShiftCombine() local
17250 DAG.ReplaceAllUsesWith(N, NewShift.getNode()); in PerformLongShiftCombine()
17251 return NewShift; in PerformLongShiftCombine()
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