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Searched refs:MemOperand (Results 1 – 11 of 11) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp88 void emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
94 bool emitOpcodePrefix(int MemOperand, const MCInst &MI,
97 bool emitREXPrefix(int MemOperand, const MCInst &MI,
662 void X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI, in emitVEXOpcodePrefix() argument
806 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
809 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
832 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
835 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
879 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
882 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiMemAluCombiner.cpp158 const MachineMemOperand *MemOperand = *MI.memoperands_begin(); in isNonVolatileMemoryOp() local
162 if (MemOperand->isVolatile() || MemOperand->isAtomic()) in isNonVolatileMemoryOp()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DSDNodeProperties.td30 def SDNPMemOperand : SDNodeProperty; // Touches memory, has assoc MemOperand
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.h1429 auto *MemOperand = *MI.memoperands_begin();
1430 return MemOperand->isStore() &&
1431 MemOperand->getPseudoValue() &&
1432 MemOperand->getPseudoValue()->kind() == PseudoSourceValue::FixedStack
1433 && !MemOperand->getPseudoValue()->isAliased(MFI);
H A DInstrRefBasedImpl.cpp1358 auto *MemOperand = *MI.memoperands_begin(); in findLocationForMemOperand() local
1359 unsigned SizeInBits = MemOperand->getSizeInBits(); in findLocationForMemOperand()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrThumb.td175 def t_addrmode_pc : MemOperand {
185 def t_addrmode_rr : MemOperand,
198 def t_addrmode_rr_sext : MemOperand,
214 def t_addrmode_rrs1 : MemOperand,
222 def t_addrmode_rrs2 : MemOperand,
230 def t_addrmode_rrs4 : MemOperand,
242 def t_addrmode_is4 : MemOperand,
254 def t_addrmode_is2 : MemOperand,
266 def t_addrmode_is1 : MemOperand,
280 def t_addrmode_sp : MemOperand,
H A DARMInstrInfo.td551 class MemOperand : Operand<i32> { let OperandType = "OPERAND_MEMORY"; }
1102 class AddrMode_Imm12 : MemOperand,
1125 def ldst_so_reg : MemOperand,
1141 def postidx_imm8 : MemOperand {
1153 def postidx_imm8s4 : MemOperand {
1166 def postidx_reg : MemOperand {
1178 def am2offset_reg : MemOperand,
1191 def am2offset_imm : MemOperand,
1206 class AddrMode3 : MemOperand,
1229 def am3offset : MemOperand,
[all …]
H A DARMInstrThumb2.td174 def t2_addr_offset_none : MemOperand {
184 def t2_nosp_addr_offset_none : MemOperand {
193 def t2addrmode_imm12 : MemOperand,
203 def t2ldrlabel : MemOperand {
226 def t2addrmode_posimm8 : MemOperand {
239 def t2addrmode_negimm8 : MemOperand,
253 class T2AddrMode_Imm8 : MemOperand,
269 def t2am_imm8_offset : MemOperand,
279 class T2AddrMode_Imm8s4 : MemOperand,
296 def t2am_imm8s4_offset : MemOperand {
[all …]
H A DARMInstrMVE.td125 class taddrmode_imm7<int shift> : MemOperand,
147 class T2AddrMode_Imm7<int shift> : MemOperand,
187 class t2am_imm7_offset<int shift> : MemOperand,
211 class mve_addr_rq_shift<int shift> : MemOperand {
230 class mve_addr_q_shift<int shift> : MemOperand {
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrArithmetic.td560 /// MemOperand - This is the memory operand associated with this type. For
562 X86MemOperand MemOperand = memoperand;
707 (ins typeinfo.RegClass:$src1, typeinfo.MemOperand:$src2),
716 (ins typeinfo.RegClass:$src1, typeinfo.MemOperand:$src2),
813 (outs), (ins typeinfo.MemOperand:$dst, typeinfo.RegClass:$src),
853 (outs), (ins typeinfo.MemOperand:$dst, typeinfo.ImmOperand:$src),
885 (outs), (ins typeinfo.MemOperand:$dst, typeinfo.Imm8Operand:$src),
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.td131 class MemOperand<RegisterClass regClass> : RegisterOperand<regClass>{
135 def GPRMemZeroOffset : MemOperand<GPR> {
140 def GPRMem : MemOperand<GPR>;
142 def SPMem : MemOperand<SP>;
144 def GPRCMem : MemOperand<GPRC>;