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/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVVPInstrPatternsVec.td35 // Masked (imm stride).
41 // Masked.
69 // Masked (imm stride).
80 // Masked.
105 // Masked.
122 // Masked.
143 // Masked with select.
154 // Masked.
164 // Masked with select.
175 // Masked.
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.h147 uint16_t Masked : 1; member
158 uint16_t Masked : 1; member
169 uint16_t Masked : 1; member
178 uint16_t Masked : 1; member
187 uint16_t Masked : 1; member
197 uint16_t Masked :1; member
205 uint16_t Masked : 1; member
H A DRISCVInstrInfoVPseudos.td478 bits<1> Masked = M;
495 let Fields = ["Masked", "IsTU", "Strided", "FF", "Log2SEW", "LMUL", "Pseudo"];
496 let PrimaryKey = ["Masked", "IsTU", "Strided", "FF", "Log2SEW", "LMUL"];
501 bits<1> Masked = M;
511 let Fields = ["Masked", "Strided", "Log2SEW", "LMUL", "Pseudo"];
512 let PrimaryKey = ["Masked", "Strided", "Log2SEW", "LMUL"];
517 bits<1> Masked = M;
533 let Fields = ["Masked", "IsTU", "Ordered", "Log2SEW", "LMUL", "IndexLMUL", "Pseudo"];
534 let PrimaryKey = ["Masked", "IsTU", "Ordered", "Log2SEW", "LMUL", "IndexLMUL"];
549 bits<1> Masked = M;
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DCaymanInstructions.td114 let DST_SEL_Y = 7; // Masked
115 let DST_SEL_Z = 7; // Masked
116 let DST_SEL_W = 7; // Masked
124 let DST_SEL_Y = 7; // Masked
125 let DST_SEL_Z = 7; // Masked
126 let DST_SEL_W = 7; // Masked
136 let DST_SEL_Y = 7; // Masked
137 let DST_SEL_Z = 7; // Masked
138 let DST_SEL_W = 7; // Masked
H A DEvergreenInstructions.td189 let DST_SEL_Y = 7; // Masked
190 let DST_SEL_Z = 7; // Masked
191 let DST_SEL_W = 7; // Masked
200 let DST_SEL_Y = 7; // Masked
201 let DST_SEL_Z = 7; // Masked
202 let DST_SEL_W = 7; // Masked
213 let DST_SEL_Y = 7; // Masked
214 let DST_SEL_Z = 7; // Masked
215 let DST_SEL_W = 7; // Masked
/openbsd-src/gnu/llvm/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp190 Value *Masked, *ShiftShAmt; in dropRedundantMaskingOfLeftShiftInput() local
192 m_Shift(m_Value(Masked), m_ZExtOrSelf(m_Value(ShiftShAmt)))); in dropRedundantMaskingOfLeftShiftInput()
197 if (match(Masked, m_CombineAnd(m_Trunc(m_Value(Masked)), m_Value(Trunc))) && in dropRedundantMaskingOfLeftShiftInput()
202 Type *WidestTy = Masked->getType(); in dropRedundantMaskingOfLeftShiftInput()
224 if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) { in dropRedundantMaskingOfLeftShiftInput()
229 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked, in dropRedundantMaskingOfLeftShiftInput()
254 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X))) || in dropRedundantMaskingOfLeftShiftInput()
255 match(Masked, m_Shr(m_Shl(m_Value(X), m_Value(MaskShAmt)), in dropRedundantMaskingOfLeftShiftInput()
261 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked, in dropRedundantMaskingOfLeftShiftInput()
302 if (!Masked->hasOneUse()) in dropRedundantMaskingOfLeftShiftInput()
[all …]
H A DInstCombineAndOrXor.cpp746 Value *Masked = Builder.CreateAnd(L1, Mask); in foldAndOrOfICmpsOfAndWithPow2() local
748 return Builder.CreateICmp(NewPred, Masked, Mask); in foldAndOrOfICmpsOfAndWithPow2()
H A DInstCombineCompares.cpp1229 Value *Masked = Builder.CreateAnd(X, Mask); in foldIRemByPowerOfTwoToBitTest() local
1230 return ICmpInst::Create(Instruction::ICmp, Pred, Masked, Zero); in foldIRemByPowerOfTwoToBitTest()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DTypePromotion.cpp637 Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask); in ConvertTruncs() local
639 Masked = Builder.CreateTrunc(Masked, ExtTy); in ConvertTruncs()
641 if (auto *I = dyn_cast<Instruction>(Masked)) in ConvertTruncs()
644 ReplaceAllUsersOfWith(Trunc, Masked); in ConvertTruncs()
/openbsd-src/gnu/llvm/llvm/lib/Support/
H A DAPFixedPoint.cpp47 APInt Masked(NewVal & Mask); in convert() local
50 if (!(Masked == Mask || Masked == 0)) { in convert()
/openbsd-src/gnu/llvm/llvm/lib/Transforms/Instrumentation/
H A DMemProfiler.cpp379 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local
380 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
H A DAddressSanitizer.cpp1449 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local
1450 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp1005 Value *Masked = IC.Builder.CreateAnd(Input, II.getArgOperand(1)); in instCombineIntrinsic() local
1007 Value *Shifted = IC.Builder.CreateLShr(Masked, ShiftAmt); in instCombineIntrinsic()
1051 Value *Masked = IC.Builder.CreateAnd(Shifted, II.getArgOperand(1)); in instCombineIntrinsic() local
1052 return IC.replaceInstUsesWith(II, Masked); in instCombineIntrinsic()
H A DX86InstrFragmentsSIMD.td723 // Masked versions of above
1146 // Masked store fragments.
H A DX86ISelDAGToDAG.cpp4505 bool FoldedBCast, bool Masked) { in getVPTESTMOpc() argument
4508 if (Masked) \ in getVPTESTMOpc()
/openbsd-src/gnu/llvm/llvm/include/llvm/IR/
H A DIntrinsicsHexagon.td418 // Masked vector stores
H A DIntrinsicsRISCV.td674 // Masked Vector Multiply-Add operations, its first operand can not be undef.
695 // Masked Widening Vector Multiply-Add operations, its first operand can not be undef.
H A DIntrinsics.td1851 //===-------------------------- Masked Intrinsics -------------------------===//
/openbsd-src/gnu/llvm/clang/include/clang/Basic/
H A Driscv_vector.td894 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy)
897 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy)
900 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Stride, Mask, VL, Policy)
903 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Index, Mask, VL, Policy)
/openbsd-src/gnu/llvm/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp834 return TTI::CastContextHint::Masked; in getCastContextHint()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp509 if (CCH == TTI::CastContextHint::Masked && DstTy.getSizeInBits() > 128) in getCastInstrCost()
515 CCH == TTI::CastContextHint::Masked) { in getCastInstrCost()
/openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h1147 Masked, ///< The cast is used with a masked load/store. enumerator
/openbsd-src/gnu/llvm/clang/lib/CodeGen/
H A DCGOpenMPRuntime.cpp11113 llvm::SmallVector<char, 2> Masked; in emitX86DeclareSimdFunction() local
11116 Masked.push_back('N'); in emitX86DeclareSimdFunction()
11117 Masked.push_back('M'); in emitX86DeclareSimdFunction()
11120 Masked.push_back('N'); in emitX86DeclareSimdFunction()
11123 Masked.push_back('M'); in emitX86DeclareSimdFunction()
11126 for (char Mask : Masked) { in emitX86DeclareSimdFunction()
/openbsd-src/gnu/llvm/llvm/docs/
H A DLangRef.rst21210 explicit vector length and where the vector mask is true. Masked-off lanes are
21263 Masked-off lanes are ``poison``.
21315 and where the vector mask is true. Masked-off lanes are ``poison``.
21370 explicit vector length and where the vector mask is true. Masked-off lanes are
21427 and where the vector mask is true. Masked-off lanes are ``poison``.
21481 vector mask is true. Masked-off lanes are ``poison``. On enabled lanes where
21537 vector mask is true. Masked-off lanes are ``poison``. On enabled lanes where
21594 explicit vector length and where the vector mask is true. Masked-off lanes are
21650 explicit vector length and where the vector mask is true. Masked-off lanes are
21708 and where the vector mask is true. Masked-off lanes are ``poison``.
[all …]
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp6716 SDValue Masked = DAG.getNode(ISD::AND, DL, VT, N, IntMax); in prepareSREMEqFold() local
6717 Created.push_back(Masked.getNode()); in prepareSREMEqFold()
6718 SDValue MaskedIsZero = DAG.getSetCC(DL, SETCCVT, Masked, Zero, Cond); in prepareSREMEqFold()

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