| /openbsd-src/gnu/llvm/llvm/include/llvm/IR/ |
| H A D | CMakeLists.txt | 2 tablegen(LLVM Attributes.inc -gen-attrs)
5 tablegen(LLVM IntrinsicImpl.inc -gen-intrinsic-impl)
6 tablegen(LLVM IntrinsicEnums.inc -gen-intrinsic-enums)
7 tablegen(LLVM IntrinsicsAArch64.h -gen-intrinsic-enums -intrinsic-prefix=aarch64)
8 tablegen(LLVM IntrinsicsAMDGPU.h -gen-intrinsic-enums -intrinsic-prefix=amdgcn)
9 tablegen(LLVM IntrinsicsARM.h -gen-intrinsic-enums -intrinsic-prefix=arm)
10 tablegen(LLVM IntrinsicsBPF.h -gen-intrinsic-enums -intrinsic-prefix=bpf)
11 tablegen(LLVM IntrinsicsDirectX.h -gen-intrinsic-enums -intrinsic-prefix=dx)
12 tablegen(LLVM IntrinsicsHexagon.h -gen-intrinsic-enums -intrinsic-prefix=hexagon)
13 tablegen(LLVM IntrinsicsLoongArch.h -gen-intrinsic-enums -intrinsic-prefix=loongarch)
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
8 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
9 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
11 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
12 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
13 tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
15 tablegen(LLVM AArch64GenPreLegalizeGICombiner.inc -gen-global-isel-combiner
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
11 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
13 tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
14 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
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| /openbsd-src/gnu/llvm/llvm/docs/CommandGuide/ |
| H A D | llvm-config.rst | 1 llvm-config - Print LLVM compilation options
14 **llvm-config** makes it easier to build applications that use LLVM. It can
16 against LLVM.
34 Print the assertion mode used when LLVM was built (ON or OFF).
38 Print the installation directory for LLVM binaries.
42 Print the build mode used when LLVM was built (e.g. Debug or Release).
46 Print the build system used to build LLVM (e.g. `cmake` or `gn`).
50 Print the C compiler flags needed to use LLVM headers.
54 Print the installation directory for LLVM CMake modules.
62 Print the C preprocessor flags needed to use LLVM headers.
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM MipsGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM MipsGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel)
11 tablegen(LLVM MipsGenGlobalISel.inc -gen-global-isel)
12 tablegen(LLVM MipsGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
14 tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
15 tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter)
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM M68kGenGlobalISel.inc -gen-global-isel)
6 tablegen(LLVM M68kGenRegisterInfo.inc -gen-register-info)
7 tablegen(LLVM M68kGenRegisterBank.inc -gen-register-bank)
8 tablegen(LLVM M68kGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM M68kGenSubtargetInfo.inc -gen-subtarget)
10 tablegen(LLVM M68kGenMCCodeEmitter.inc -gen-emitter)
11 tablegen(LLVM M68kGenMCPseudoLowering.inc -gen-pseudo-lowering)
12 tablegen(LLVM M68kGenDAGISel.inc -gen-dag-isel)
13 tablegen(LLVM M68kGenCallingConv.inc -gen-callingconv)
14 tablegen(LLVM M68kGenAsmWriter.inc -gen-asm-writer)
[all …]
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| /openbsd-src/gnu/llvm/llvm/include/llvm/Config/ |
| H A D | llvm-config.h.cmake | 3 /* Part of the LLVM Project, under the Apache License v2.0 with LLVM */
6 /* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */
10 /* This file enumerates variables from the LLVM configuration so that they
20 /* Target triple LLVM will generate code for by default */
30 /* Host triple LLVM will be executed on */
33 /* LLVM architecture name for the native architecture, if available */
36 /* LLVM name for the native AsmParser init function, if available */
39 /* LLVM name for the native AsmPrinter init function, if available */
42 /* LLVM name for the native Disassembler init function, if available */
45 /* LLVM name for the native Target init function, if available */
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM X86GenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
8 tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
9 tablegen(LLVM X86GenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM X86GenDisassemblerTables.inc -gen-disassembler)
11 tablegen(LLVM X86GenEVEX2VEXTables.inc -gen-x86-EVEX2VEX-tables)
12 tablegen(LLVM X86GenExegesis.inc -gen-exegesis)
13 tablegen(LLVM X86GenFastISel.inc -gen-fast-isel)
14 tablegen(LLVM X86GenGlobalISel.inc -gen-global-isel)
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
11 tablegen(LLVM ARMGenGlobalISel.inc -gen-global-isel)
12 tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
13 tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
14 tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM RISCVGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM RISCVGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM RISCVGenCompressInstEmitter.inc -gen-compress-inst-emitter)
8 tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM RISCVGenGlobalISel.inc -gen-global-isel)
11 tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info)
12 tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter)
13 tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering)
14 tablegen(LLVM RISCVGenRegisterBank.inc -gen-register-bank)
[all …]
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM CSKYGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM CSKYGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM CSKYGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM CSKYGenCompressInstEmitter.inc -gen-compress-inst-emitter)
9 tablegen(LLVM CSKYGenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM CSKYGenDisassemblerTables.inc -gen-disassembler)
11 tablegen(LLVM CSKYGenInstrInfo.inc -gen-instr-info)
12 tablegen(LLVM CSKYGenMCCodeEmitter.inc -gen-emitter)
13 tablegen(LLVM CSKYGenMCPseudoLowering.inc -gen-pseudo-lowering)
14 tablegen(LLVM CSKYGenRegisterInfo.inc -gen-register-info)
[all …]
|
| /openbsd-src/gnu/llvm/llvm/docs/ |
| H A D | Reference.rst | 4 LLVM and API reference documentation.
67 LLVM Reference
74 :doc:`LLVM Command Guide <CommandGuide/index>`
75 A reference manual for the LLVM command line utilities ("man" pages for LLVM
111 Information on writing and using Fuzzers to find bugs in LLVM.
114 LLVM IR
117 :doc:`LLVM Language Reference Manual <LangRef>`
118 Defines the LLVM intermediate representation and the assembly form of the
125 This describes the file format and encoding used for LLVM "bc" files.
129 LLVM's code generation passes.
[all …]
|
| H A D | UserGuides.rst | 4 NOTE: If you are a user who is only interested in using an LLVM-based compiler,
7 intermediate LLVM representation.
78 Notes on building and testing LLVM/Clang on ARM.
81 Notes on building LLVM/Clang with PGO.
84 Notes on cross-building and testing LLVM/Clang.
92 This describes the format and encoding used for LLVM’s code coverage mapping.
97 LLVM Builds and Distributions
101 A best-practices guide for using LLVM's CMake build system to package and
102 distribute LLVM-based tools.
109 A reference for using Dockerfiles provided with LLVM.
[all …]
|
| H A D | index.rst | 6 If you are using a released version of LLVM, see `the download page
9 The LLVM compiler infrastructure supports a wide range of projects, from
16 LLVM Design & Overview
27 `Introduction to the LLVM Compiler`__
28 Presentation providing a users introduction to LLVM.
30 .. __: https://llvm.org/pubs/2008-10-04-ACAT-LLVM-Intro.html
32 `Intro to LLVM`__
34 describes high-level design decisions that shaped LLVM.
39 `LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation`__
42 .. __: https://llvm.org/pubs/2004-01-30-CGO-LLVM.html
[all …]
|
| H A D | Security.rst | 2 LLVM Security Group
5 The LLVM Security Group has the following goals:
7 1. Allow LLVM contributors and security researchers to disclose security-related issues affecting t…
10 4. Ensure timely notification and release to vendors who package and distribute LLVM-based toolchai…
11 5. Ensure timely notification to users of LLVM-based toolchains whose compiled code is security-sen…
16 The LLVM Security Group is private. It is composed of trusted LLVM contributors. Its discussions re…
23 To report a security issue in the LLVM Project, please `open a new issue`_ in the LLVM project page…
25 …g on the `Discourse forums`_ asking to get in touch with someone from the LLVM Security Group. **T…
59 * Nominees for LLVM Security Group membership should fall in one of these groups:
66 + Has actively contributed non-trivial code to the LLVM project in the last year.
[all …]
|
| H A D | Packaging.rst | 2 Advice on Packaging LLVM
11 LLVM sets certain default configure options to make sure our developers don't
16 LLVM's API changes with each release, so users are likely to want, for example,
17 both LLVM-2.6 and LLVM-2.7 installed at the same time to support apps developed
23 LLVM runs much more quickly when it's optimized and assertions are removed.
27 versions of LLVM in parallel. The following configure flags are relevant:
30 Builds LLVM with ``NDEBUG`` defined. Changes the LLVM ABI. Also available
36 Builds LLVM with ``-g``. Also available by setting ``DEBUG_SYMBOLS=0|1`` in
41 (For git checkouts) Builds LLVM with ``-O2`` and, by default, turns off
50 LLVM disables RTTI by default. Add ``REQUIRES_RTTI=1`` to your environment
[all …]
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM PPCGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
11 tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
12 tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter)
13 tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
14 tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
[all …]
|
| /openbsd-src/gnu/llvm/llvm/bindings/ocaml/llvm/ |
| H A D | META.llvm.in | 3 description = "LLVM OCaml bindings"
11 description = "Intermediate representation analysis for LLVM"
19 description = "Bitcode reader for LLVM"
27 description = "Bitcode writer for LLVM"
35 description = "JIT and Interpreter for LLVM"
43 description = "IPO Transforms for LLVM"
51 description = "DebugInfo support for LLVM"
59 description = "IR assembly reader for LLVM"
67 description = "Scalar Transforms for LLVM"
75 description = "Transform utilities for LLVM"
[all …]
|
| /openbsd-src/gnu/llvm/llvm/docs/tutorial/ |
| H A D | index.rst | 2 LLVM Tutorial: Table of Contents
5 Kaleidoscope: Implementing a Language with LLVM
15 language using LLVM components in C++.
24 Building a JIT in LLVM
37 `Tutorial: Creating an LLVM Backend for the Cpu0 Architecture <http://jonathan2251.github.io/lbd/>`_
38 A step-by-step tutorial for developing an LLVM backend. Under
42 `Howto: Implementing LLVM Integrated Assembler`_
43 A simple guide for how to implement an LLVM integrated assembler for an
46 .. _`Howto: Implementing LLVM Integrated Assembler`: http://www.embecosm.com/appnotes/ean10/ean10-h…
51 #. `Writing an Optimization for LLVM <https://llvm.org/pubs/2004-09-22-LCPCLLVMTutorial.html>`_
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM MSP430GenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM MSP430GenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM MSP430GenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM MSP430GenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM MSP430GenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM MSP430GenInstrInfo.inc -gen-instr-info)
11 tablegen(LLVM MSP430GenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM MSP430GenRegisterInfo.inc -gen-register-info)
13 tablegen(LLVM MSP430GenSubtargetInfo.inc -gen-subtarget)
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM SparcGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM SparcGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info)
11 tablegen(LLVM SparcGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM SparcGenRegisterInfo.inc -gen-register-info)
13 tablegen(LLVM SparcGenSubtargetInfo.inc -gen-subtarget)
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM LoongArchGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM LoongArchGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM LoongArchGenDAGISel.inc -gen-dag-isel)
8 tablegen(LLVM LoongArchGenDisassemblerTables.inc -gen-disassembler)
9 tablegen(LLVM LoongArchGenInstrInfo.inc -gen-instr-info)
10 tablegen(LLVM LoongArchGenMCPseudoLowering.inc -gen-pseudo-lowering)
11 tablegen(LLVM LoongArchGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM LoongArchGenRegisterInfo.inc -gen-register-info)
13 tablegen(LLVM LoongArchGenSubtargetInfo.inc -gen-subtarget)
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM AVRGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM AVRGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM AVRGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM AVRGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM AVRGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM AVRGenInstrInfo.inc -gen-instr-info)
11 tablegen(LLVM AVRGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM AVRGenRegisterInfo.inc -gen-register-info)
13 tablegen(LLVM AVRGenSubtargetInfo.inc -gen-subtarget)
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM VEGenRegisterInfo.inc -gen-register-info)
6 tablegen(LLVM VEGenInstrInfo.inc -gen-instr-info)
7 tablegen(LLVM VEGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM VEGenMCCodeEmitter.inc -gen-emitter)
9 tablegen(LLVM VEGenAsmWriter.inc -gen-asm-writer)
10 tablegen(LLVM VEGenAsmMatcher.inc -gen-asm-matcher)
11 tablegen(LLVM VEGenDAGISel.inc -gen-dag-isel)
12 tablegen(LLVM VEGenSubtargetInfo.inc -gen-subtarget)
13 tablegen(LLVM VEGenCallingConv.inc -gen-callingconv)
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/ |
| H A D | CMakeLists.txt | 5 tablegen(LLVM LanaiGenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM LanaiGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM LanaiGenCallingConv.inc -gen-callingconv)
8 tablegen(LLVM LanaiGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM LanaiGenDisassemblerTables.inc -gen-disassembler)
10 tablegen(LLVM LanaiGenInstrInfo.inc -gen-instr-info)
11 tablegen(LLVM LanaiGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM LanaiGenRegisterInfo.inc -gen-register-info)
13 tablegen(LLVM LanaiGenSubtargetInfo.inc -gen-subtarget)
|