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Searched refs:LLT (Results 1 – 25 of 153) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86LegalizerInfo.cpp76 .minScalar(0, LLT::scalar(32)) in X86LegalizerInfo()
106 const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0)); in setLegalizerInfo32bit()
107 const LLT s1 = LLT::scalar(1); in setLegalizerInfo32bit()
108 const LLT s8 = LLT::scalar(8); in setLegalizerInfo32bit()
109 const LLT s16 = LLT::scalar(16); in setLegalizerInfo32bit()
110 const LLT s32 = LLT::scalar(32); in setLegalizerInfo32bit()
111 const LLT s64 = LLT::scalar(64); in setLegalizerInfo32bit()
112 const LLT s128 = LLT::scalar(128); in setLegalizerInfo32bit()
205 const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0)); in setLegalizerInfo64bit()
206 const LLT s1 = LLT::scalar(1); in setLegalizerInfo64bit()
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H A DX86InstructionSelector.cpp74 unsigned getLoadStoreOp(const LLT &Ty, const RegisterBank &RB, unsigned Opc,
129 const TargetRegisterClass *getRegClass(LLT Ty, const RegisterBank &RB) const;
130 const TargetRegisterClass *getRegClass(LLT Ty, unsigned Reg,
171 X86InstructionSelector::getRegClass(LLT Ty, const RegisterBank &RB) const { in getRegClass()
201 X86InstructionSelector::getRegClass(LLT Ty, unsigned Reg, in getRegClass()
247 LLT Ty = MRI.getType(Reg); in selectDebugInstr()
433 unsigned X86InstructionSelector::getLoadStoreOp(const LLT &Ty, in getLoadStoreOp()
442 if (Ty == LLT::scalar(8)) { in getLoadStoreOp()
445 } else if (Ty == LLT::scalar(16)) { in getLoadStoreOp()
448 } else if (Ty == LLT::scalar(32) || Ty == LLT::pointer(0, 32)) { in getLoadStoreOp()
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/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp63 const LLT s1 = LLT::scalar(1); in SPIRVLegalizerInfo()
64 const LLT s8 = LLT::scalar(8); in SPIRVLegalizerInfo()
65 const LLT s16 = LLT::scalar(16); in SPIRVLegalizerInfo()
66 const LLT s32 = LLT::scalar(32); in SPIRVLegalizerInfo()
67 const LLT s64 = LLT::scalar(64); in SPIRVLegalizerInfo()
69 const LLT v16s64 = LLT::fixed_vector(16, 64); in SPIRVLegalizerInfo()
70 const LLT v16s32 = LLT::fixed_vector(16, 32); in SPIRVLegalizerInfo()
71 const LLT v16s16 = LLT::fixed_vector(16, 16); in SPIRVLegalizerInfo()
72 const LLT v16s8 = LLT::fixed_vector(16, 8); in SPIRVLegalizerInfo()
73 const LLT v16s1 = LLT::fixed_vector(16, 1); in SPIRVLegalizerInfo()
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/openbsd-src/gnu/llvm/llvm/lib/Support/
H A DLowLevelType.cpp18 LLT::LLT(MVT VT) { in LLT() function in LLT
37 void LLT::print(raw_ostream &OS) const { in print()
50 const constexpr LLT::BitFieldInfo LLT::ScalarSizeFieldInfo;
51 const constexpr LLT::BitFieldInfo LLT::PointerSizeFieldInfo;
52 const constexpr LLT::BitFieldInfo LLT::PointerAddressSpaceFieldInfo;
53 const constexpr LLT::BitFieldInfo LLT::VectorElementsFieldInfo;
54 const constexpr LLT::BitFieldInfo LLT::VectorScalableFieldInfo;
55 const constexpr LLT::BitFieldInfo LLT::VectorSizeFieldInfo;
56 const constexpr LLT::BitFieldInfo LLT::PointerVectorElementsFieldInfo;
57 const constexpr LLT::BitFieldInfo LLT::PointerVectorScalableFieldInfo;
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerHelper.h98 LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
103 LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
106 LegalizeResult bitcast(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
110 LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
115 LLT NarrowTy);
120 LLT MoreTy);
133 void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx,
139 void narrowScalarSrc(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx);
144 void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx = 0,
150 void narrowScalarDst(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx,
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H A DLegalizerInfo.h110 ArrayRef<LLT> Types;
113 LLT MemoryTy;
118 MemDesc(LLT MemoryTy, uint64_t AlignInBits, AtomicOrdering Ordering) in MemDesc()
130 constexpr LegalityQuery(unsigned Opcode, const ArrayRef<LLT> Types, in LegalityQuery()
133 constexpr LegalityQuery(unsigned Opcode, const ArrayRef<LLT> Types) in LegalityQuery()
148 LLT NewType;
151 const LLT NewType) in LegalizeActionStep()
201 std::function<std::pair<unsigned, LLT>(const LegalityQuery &)>;
205 LLT Type0;
206 LLT Type1;
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H A DLegalizationArtifactCombiner.h96 const LLT DstTy = MRI.getType(DstReg); in tryCombineAnyExt()
126 LLT DstTy = MRI.getType(DstReg); in tryCombineZExt()
131 LLT SrcTy = MRI.getType(SrcReg); in tryCombineZExt()
159 const LLT DstTy = MRI.getType(DstReg); in tryCombineZExt()
185 LLT DstTy = MRI.getType(DstReg); in tryCombineSExt()
189 LLT SrcTy = MRI.getType(SrcReg); in tryCombineSExt()
215 const LLT DstTy = MRI.getType(DstReg); in tryCombineSExt()
243 const LLT DstTy = MRI.getType(DstReg); in tryCombineTrunc()
258 const LLT MergeSrcTy = MRI.getType(MergeSrcReg); in tryCombineTrunc()
259 const LLT DstTy = MRI.getType(DstReg); in tryCombineTrunc()
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/openbsd-src/gnu/llvm/llvm/include/llvm/Support/
H A DLowLevelTypeImpl.h39 class LLT {
42 static constexpr LLT scalar(unsigned SizeInBits) { in scalar()
43 return LLT{/*isPointer=*/false, /*isVector=*/false, /*isScalar=*/true, in scalar()
49 static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits) { in pointer()
51 return LLT{/*isPointer=*/true, /*isVector=*/false, /*isScalar=*/false, in pointer()
56 static constexpr LLT vector(ElementCount EC, unsigned ScalarSizeInBits) { in vector()
58 return LLT{/*isPointer=*/false, /*isVector=*/true, /*isScalar=*/false, in vector()
63 static constexpr LLT vector(ElementCount EC, LLT ScalarTy) { in vector()
66 return LLT{ScalarTy.isPointer(), in vector()
76 static constexpr LLT fixed_vector(unsigned NumElements, in fixed_vector()
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DLegalizeMutations.cpp17 LegalizeMutation LegalizeMutations::changeTo(unsigned TypeIdx, LLT Ty) { in changeTo()
32 const LLT OldTy = Query.Types[TypeIdx]; in changeElementTo()
33 const LLT NewTy = Query.Types[FromTypeIdx]; in changeElementTo()
39 LLT NewEltTy) { in changeElementTo()
41 const LLT OldTy = Query.Types[TypeIdx]; in changeElementTo()
49 const LLT OldTy = Query.Types[TypeIdx]; in changeElementCountTo()
50 const LLT NewTy = Query.Types[FromTypeIdx]; in changeElementCountTo()
58 LLT NewEltTy) { in changeElementCountTo()
60 const LLT OldTy = Query.Types[TypeIdx]; in changeElementCountTo()
70 const LLT OldTy = Query.Types[TypeIdx]; in changeElementSizeTo()
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H A DLegalityPredicates.cpp28 LegalityPredicate LegalityPredicates::typeIs(unsigned TypeIdx, LLT Type) { in typeIs()
35 std::initializer_list<LLT> TypesInit) { in typeInSet()
36 SmallVector<LLT, 4> Types = TypesInit; in typeInSet()
44 std::initializer_list<std::pair<LLT, LLT>> TypesInit) { in typePairInSet() argument
45 SmallVector<std::pair<LLT, LLT>, 4> Types = TypesInit; in typePairInSet()
47 std::pair<LLT, LLT> Match = {Query.Types[TypeIdx0], Query.Types[TypeIdx1]}; in typePairInSet()
88 LLT Ty = Query.Types[TypeIdx]; in isPointer()
94 LLT EltTy) { in elementTypeIs()
96 const LLT QueryTy = Query.Types[TypeIdx]; in elementTypeIs()
104 const LLT QueryTy = Query.Types[TypeIdx]; in scalarNarrowerThan()
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H A DLegalizerHelper.cpp53 getNarrowTypeBreakDown(LLT OrigTy, LLT NarrowTy, LLT &LeftoverTy) { in getNarrowTypeBreakDown()
69 LeftoverTy = LLT::scalarOrVector( in getNarrowTypeBreakDown()
72 LeftoverTy = LLT::scalar(LeftoverSize); in getNarrowTypeBreakDown()
79 static Type *getFloatTypeForLLT(LLVMContext &Ctx, LLT Ty) { in getFloatTypeForLLT()
158 void LegalizerHelper::extractParts(Register Reg, LLT Ty, int NumParts, in extractParts()
165 bool LegalizerHelper::extractParts(Register Reg, LLT RegTy, in extractParts()
166 LLT MainTy, LLT &LeftoverTy, in extractParts()
195 LeftoverTy = LLT::scalar(LeftoverSize); in extractParts()
215 LLT RegTy = MRI.getType(Reg); in extractVectorParts()
218 LLT EltTy = RegTy.getElementType(); in extractVectorParts()
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H A DCallLowering.cpp293 LLT LLTy = MRI.getType(DstRegs[0]); in mergeVectorRegsToResultRegs()
294 LLT PartLLT = MRI.getType(SrcRegs[0]); in mergeVectorRegsToResultRegs()
297 LLT LCMTy = getCoverTy(LLTy, PartLLT); in mergeVectorRegsToResultRegs()
337 ArrayRef<Register> Regs, LLT LLTy, LLT PartLLT, in buildCopyFromRegs()
363 LLT LocTy = MRI.getType(SrcReg); in buildCopyFromRegs()
374 LLT OrigTy = MRI.getType(OrigRegs[0]); in buildCopyFromRegs()
376 LLT IntPtrTy = LLT::scalar(OrigTy.getSizeInBits()); in buildCopyFromRegs()
387 LLT OrigTy = MRI.getType(OrigRegs[0]); in buildCopyFromRegs()
393 auto Widened = B.buildMergeLikeInstr(LLT::scalar(SrcSize), Regs); in buildCopyFromRegs()
410 LLT NewTy = PartLLT.changeElementType(LLTy.getElementType()) in buildCopyFromRegs()
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H A DMachineIRBuilder.cpp167 MachineInstrBuilder MachineIRBuilder::buildJumpTable(const LLT PtrTy, in buildJumpTable()
173 void MachineIRBuilder::validateUnaryOp(const LLT Res, const LLT Op0) { in validateUnaryOp()
178 void MachineIRBuilder::validateBinaryOp(const LLT Res, const LLT Op0, in validateBinaryOp()
179 const LLT Op1) { in validateBinaryOp()
184 void MachineIRBuilder::validateShiftOp(const LLT Res, const LLT Op0, in validateShiftOp()
185 const LLT Op1) { in validateShiftOp()
202 const LLT ValueTy, uint64_t Value) { in materializePtrAdd()
219 LLT PtrTy = Res.getLLTTy(*getMRI()); in buildMaskLowPtrBits()
220 LLT MaskTy = LLT::scalar(PtrTy.getSizeInBits()); in buildMaskLowPtrBits()
229 LLT ResTy = Res.getLLTTy(*getMRI()); in buildPadVectorWithUndefElements()
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/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/GISel/
H A DPPCLegalizerInfo.cpp22 const LLT P0 = LLT::pointer(0, 64); in PPCLegalizerInfo()
23 const LLT S1 = LLT::scalar(1); in PPCLegalizerInfo()
24 const LLT S8 = LLT::scalar(8); in PPCLegalizerInfo()
25 const LLT S16 = LLT::scalar(16); in PPCLegalizerInfo()
26 const LLT S32 = LLT::scalar(32); in PPCLegalizerInfo()
27 const LLT S64 = LLT::scalar(64); in PPCLegalizerInfo()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp50 static LLT getPow2VectorType(LLT Ty) { in getPow2VectorType()
57 static LLT getPow2ScalarType(LLT Ty) { in getPow2ScalarType()
60 return LLT::scalar(Pow2Bits); in getPow2ScalarType()
68 const LLT Ty = Query.Types[TypeIdx]; in isSmallOddVector()
72 const LLT EltTy = Ty.getElementType(); in isSmallOddVector()
82 const LLT Ty = Query.Types[TypeIdx]; in sizeIsMultipleOf32()
89 const LLT Ty = Query.Types[TypeIdx]; in isWideVec16()
90 const LLT EltTy = Ty.getScalarType(); in isWideVec16()
97 const LLT Ty = Query.Types[TypeIdx]; in oneMoreElement()
98 const LLT EltTy = Ty.getElementType(); in oneMoreElement()
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H A DAMDGPUArgumentUsageInfo.cpp89 std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT>
95 &AMDGPU::SGPR_128RegClass, LLT::fixed_vector(4, 32)); in getPreloadedValue()
100 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getPreloadedValue()
103 &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); in getPreloadedValue()
106 &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); in getPreloadedValue()
109 &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); in getPreloadedValue()
112 &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); in getPreloadedValue()
116 &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); in getPreloadedValue()
120 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getPreloadedValue()
124 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getPreloadedValue()
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H A DAMDGPURegisterBankInfo.cpp127 const LLT S32 = LLT::scalar(32); in applyBank()
128 assert(MRI.getType(SrcReg) == LLT::scalar(1)); in applyBank()
166 if (MRI.getType(Reg) == LLT::scalar(1)) { in applyBank()
276 LLT Ty) const { in getRegBankFromRegClass()
289 return Ty == LLT::scalar(1) ? AMDGPU::VCCRegBank : AMDGPU::SGPRRegBank; in getRegBankFromRegClass()
536 LLT PtrTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrAlternativeMappings()
643 LLT HalfTy, in split64BitValueForMapping()
664 LLT NewTy) { in setRegsToType()
671 static LLT getHalfSizedType(LLT Ty) { in getHalfSizedType()
674 return LLT::scalarOrVector(Ty.getElementCount().divideCoefficientBy(2), in getHalfSizedType()
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DLowLevelType.cpp20 LLT llvm::getLLTForType(Type &Ty, const DataLayout &DL) { in getLLTForType()
23 LLT ScalarTy = getLLTForType(*VTy->getElementType(), DL); in getLLTForType()
26 return LLT::vector(EC, ScalarTy); in getLLTForType()
31 return LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace)); in getLLTForType()
39 return LLT::scalar(SizeInBits); in getLLTForType()
42 return LLT(); in getLLTForType()
45 MVT llvm::getMVTForLLT(LLT Ty) { in getMVTForLLT()
54 EVT llvm::getApproximateEVTForLLT(LLT Ty, const DataLayout &DL, in getApproximateEVTForLLT()
64 LLT llvm::getLLTForMVT(MVT Ty) { in getLLTForMVT()
66 return LLT::scalar(Ty.getSizeInBits()); in getLLTForMVT()
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/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp44 const LLT p0 = LLT::pointer(0, 64); in AArch64LegalizerInfo()
45 const LLT s8 = LLT::scalar(8); in AArch64LegalizerInfo()
46 const LLT s16 = LLT::scalar(16); in AArch64LegalizerInfo()
47 const LLT s32 = LLT::scalar(32); in AArch64LegalizerInfo()
48 const LLT s64 = LLT::scalar(64); in AArch64LegalizerInfo()
49 const LLT s128 = LLT::scalar(128); in AArch64LegalizerInfo()
50 const LLT v16s8 = LLT::fixed_vector(16, 8); in AArch64LegalizerInfo()
51 const LLT v8s8 = LLT::fixed_vector(8, 8); in AArch64LegalizerInfo()
52 const LLT v4s8 = LLT::fixed_vector(4, 8); in AArch64LegalizerInfo()
53 const LLT v8s16 = LLT::fixed_vector(8, 16); in AArch64LegalizerInfo()
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H A DAArch64PostLegalizerCombiner.cpp55 std::tuple<unsigned, LLT, Register> &MatchInfo) { in matchExtractVecEltPairwiseAdd() argument
58 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); in matchExtractVecEltPairwiseAdd()
98 std::tuple<unsigned, LLT, Register> &MatchInfo) { in applyExtractVecEltPairwiseAdd() argument
102 LLT Ty = std::get<1>(MatchInfo); in applyExtractVecEltPairwiseAdd()
104 LLT s64 = LLT::scalar(64); in applyExtractVecEltPairwiseAdd()
131 const LLT Ty = MRI.getType(LHS); in matchAArch64MulConstCombine()
214 auto Shift = B.buildConstant(LLT::scalar(64), ShiftAmt); in matchAArch64MulConstCombine()
229 B.buildShl(DstReg, Res, B.buildConstant(LLT::scalar(64), TrailingZeroes)); in matchAArch64MulConstCombine()
250 LLT SrcTy = MRI.getType(Merge.getSourceReg(0)); in matchFoldMergeToZext()
251 if (SrcTy != LLT::scalar(32) || Merge.getNumSources() != 2) in matchFoldMergeToZext()
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H A DAArch64InstructionSelector.cpp168 bool tryOptConstantBuildVec(MachineInstr &MI, LLT DstTy,
280 const RegisterBank &DstRB, LLT ScalarTy,
514 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, in getRegClassForTypeOnBank()
708 LLT Ty = MRI.getType(I.getOperand(0).getReg()); in unsupportedBinOp()
923 LLT Ty = MRI.getType(Reg); in selectDebugInstr()
1033 static unsigned selectFPConvOpc(unsigned GenericOpc, LLT DstTy, LLT SrcTy) { in selectFPConvOpc()
1117 LLT Ty = MRI.getType(True); in emitSelect()
1533 LLT Ty = MRI.getType(TestReg); in emitTestBit()
1774 MIB.buildInstr(AArch64::ANDSWri, {LLT::scalar(32)}, {CondReg}).addImm(1); in selectCompareBranch()
1794 static std::optional<int64_t> getVectorSHLImm(LLT SrcTy, Register Reg, in getVectorSHLImm()
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/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/GISel/
H A DM68kLegalizerInfo.cpp24 const LLT s8 = LLT::scalar(8); in M68kLegalizerInfo()
25 const LLT s16 = LLT::scalar(16); in M68kLegalizerInfo()
26 const LLT s32 = LLT::scalar(32); in M68kLegalizerInfo()
27 const LLT p0 = LLT::pointer(0, 32); in M68kLegalizerInfo()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMRegisterBankInfo.cpp178 LLT) const { in getRegBankFromRegClass()
238 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
273 LLT LargeTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrMapping()
283 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
296 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
303 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
317 LLT ToTy = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
318 LLT FromTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrMapping()
326 LLT ToTy = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
327 LLT FromTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrMapping()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp22 LLT ValTy;
23 LLT PtrTy;
63 std::initializer_list<LLT> SupportedValues) { in CheckTyN()
70 const LLT s1 = LLT::scalar(1); in MipsLegalizerInfo()
71 const LLT s8 = LLT::scalar(8); in MipsLegalizerInfo()
72 const LLT s16 = LLT::scalar(16); in MipsLegalizerInfo()
73 const LLT s32 = LLT::scalar(32); in MipsLegalizerInfo()
74 const LLT s64 = LLT::scalar(64); in MipsLegalizerInfo()
75 const LLT v16s8 = LLT::fixed_vector(16, 8); in MipsLegalizerInfo()
76 const LLT v8s16 = LLT::fixed_vector(8, 16); in MipsLegalizerInfo()
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DLowLevelType.h29 LLT getLLTForType(Type &Ty, const DataLayout &DL);
33 MVT getMVTForLLT(LLT Ty);
34 EVT getApproximateEVTForLLT(LLT Ty, const DataLayout &DL, LLVMContext &Ctx);
38 LLT getLLTForMVT(MVT Ty);
42 const llvm::fltSemantics &getFltSemanticForLLT(LLT Ty);

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