Searched refs:IsWave32 (Results 1 – 6 of 6) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIPreEmitPeephole.cpp | 89 const bool IsWave32 = ST.isWave32(); in optimizeVccBranch() local
91 const unsigned ExecReg = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in optimizeVccBranch()
92 const unsigned And = IsWave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64; in optimizeVccBranch()
93 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch()
94 const unsigned Mov = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in optimizeVccBranch()
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| H A D | SILowerI1Copies.cpp | 47 bool IsWave32 = false; member in __anon1ceaab0c0111::SILowerI1Copies
447 IsWave32 = ST->isWave32(); in runOnMachineFunction()
449 if (IsWave32) { in runOnMachineFunction()
564 MRI->setRegClass(DstReg, IsWave32 ? &AMDGPU::SReg_32RegClass in lowerPhis()
694 MRI->setRegClass(DstReg, IsWave32 ? &AMDGPU::SReg_32RegClass in lowerCopiesToI1()
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| H A D | SILowerControlFlow.cpp | 706 bool IsWave32 = ST.isWave32(); in lowerInitExec() local
711 TII->get(IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64), Exec) in lowerInitExec()
758 TII->get(IsWave32 ? AMDGPU::S_BFM_B32 : AMDGPU::S_BFM_B64), Exec) in lowerInitExec()
768 TII->get(IsWave32 ? AMDGPU::S_CMOV_B32 : AMDGPU::S_CMOV_B64), in lowerInitExec()
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| H A D | SIFixSGPRCopies.cpp | 1065 bool IsWave32 = MF.getSubtarget<GCNSubtarget>().isWave32(); in fixSCCCopies() local
1082 TII->get(IsWave32 ? AMDGPU::S_CSELECT_B32 in fixSCCCopies()
1094 unsigned Opcode = IsWave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64; in fixSCCCopies()
1095 Register Exec = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in fixSCCCopies()
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| H A D | SIRegisterInfo.cpp | 107 bool IsWave32; member
113 bool IsWave32, MachineBasicBlock::iterator MI, int Index, in SGPRSpillBuilder()
115 : SGPRSpillBuilder(TRI, TII, IsWave32, MI, MI->getOperand(0).getReg(), in SGPRSpillBuilder()
119 bool IsWave32, MachineBasicBlock::iterator MI, Register Reg, in SGPRSpillBuilder()
124 IsWave32(IsWave32) { in SGPRSpillBuilder()
129 if (IsWave32) { in SGPRSpillBuilder()
146 Data.PerVGPR = IsWave32 ? 32 : 64; in getPerVGPRData()
200 IsWave32 ? AMDGPU::SGPR_32RegClass : AMDGPU::SGPR_64RegClass; in prepare()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 1025 bool IsWave32 = EnableWavefrontSize32 ? in getVGPRAllocGranule() local
1030 return IsWave32 ? 24 : 12; in getVGPRAllocGranule()
1033 return IsWave32 ? 16 : 8; in getVGPRAllocGranule()
1035 return IsWave32 ? 8 : 4; in getVGPRAllocGranule()
1043 bool IsWave32 = EnableWavefrontSize32 ? in getVGPREncodingGranule() local
1047 return IsWave32 ? 8 : 4; in getVGPREncodingGranule()
1055 bool IsWave32 = STI->getFeatureBits().test(FeatureWavefrontSize32); in getTotalNumVGPRs() local
1057 return IsWave32 ? 1536 : 768; in getTotalNumVGPRs()
1058 return IsWave32 ? 1024 : 512; in getTotalNumVGPRs()
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