| /openbsd-src/gnu/llvm/llvm/include/llvm/Support/ |
| H A D | LowLevelTypeImpl.h | 117 : IsScalar(false), IsPointer(false), IsVector(false), RawData(0) {} in LLT()
126 return isValid() && IsPointer && !IsVector; in isPointer()
129 constexpr bool isVector() const { return isValid() && IsVector; } in isVector()
151 assert(IsVector && "cannot get number of elements on scalar/aggregate"); in getElementCount()
236 if (IsVector) { in getScalarSizeInBits()
250 if (!IsVector) in getAddressSpace()
275 return IsPointer == RHS.IsPointer && IsVector == RHS.IsVector &&
344 uint64_t IsVector : 1;
365 constexpr void init(bool IsPointer, bool IsVector, bool IsScalar,
371 this->IsVector = IsVector;
[all …]
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 491 bool isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector,
495 bool isConstFalseVal(const TargetLowering &TLI, int64_t Val, bool IsVector,
500 int64_t getICmpTrueVal(const TargetLowering &TLI, bool IsVector, bool IsFP);
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| H A D | MachineIRBuilder.h | 701 bool IsVector,
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| /openbsd-src/gnu/llvm/llvm/lib/Support/ |
| H A D | LowLevelType.cpp | 32 IsVector = false; in LLT()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 164 bool IsVector = TII->isVector(MI); in runOnMachineFunction() local
166 if (!IsReduction && !IsVector && !IsCube) { in runOnMachineFunction()
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| H A D | AMDGPUInstructionSelector.cpp | 692 const bool IsVector = DstBank->getID() == AMDGPU::VGPRRegBankID; in selectG_BUILD_VECTOR() local
712 if (IsVector) { in selectG_BUILD_VECTOR()
736 IsVector ? AMDGPU::VGPR_32RegClass : AMDGPU::SReg_32RegClass; in selectG_BUILD_VECTOR()
742 if (IsVector) { in selectG_BUILD_VECTOR()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMELFStreamer.cpp | 1404 const SmallVectorImpl<unsigned> &RegList, bool IsVector, in collectHWRegs() argument
1413 assert(Reg < (IsVector ? 32U : 16U) && "Register out of range"); in collectHWRegs()
1427 bool IsVector) { in emitRegSave() argument
1440 std::tie(Idx, Count) = collectHWRegs(MRI, Idx, RegList, IsVector, Mask); in emitRegSave()
1446 SPOffset -= Count * (IsVector ? 8 : 4); in emitRegSave()
1450 if (IsVector) in emitRegSave()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 1289 bool llvm::isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector, in isConstTrueVal() argument
1291 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstTrueVal()
1303 bool IsVector, bool IsFP) { in isConstFalseVal() argument
1304 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstFalseVal()
1314 int64_t llvm::getICmpTrueVal(const TargetLowering &TLI, bool IsVector, in getICmpTrueVal() argument
1316 switch (TLI.getBooleanContents(IsVector, IsFP)) { in getICmpTrueVal()
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| H A D | MachineIRBuilder.cpp | 488 bool IsVector, in buildBoolExtInReg() argument
491 switch (TLI->getBooleanContents(IsVector, IsFP)) { in buildBoolExtInReg()
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| H A D | CombinerHelper.cpp | 2975 int64_t Cst, bool IsVector, bool IsFP) { in isConstValidTrue() argument
2978 isConstTrueVal(TLI, Cst, IsVector, IsFP); in isConstValidTrue()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/AsmParser/ |
| H A D | LLParser.h | 436 bool parseArrayVectorType(Type *&Result, bool IsVector);
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| /openbsd-src/gnu/llvm/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 3059 bool LLParser::parseArrayVectorType(Type *&Result, bool IsVector) { in parseArrayVectorType() argument
3062 if (IsVector && Lex.getKind() == lltok::kw_vscale) { in parseArrayVectorType()
3086 if (parseToken(IsVector ? lltok::greater : lltok::rsquare, in parseArrayVectorType()
3090 if (IsVector) { in parseArrayVectorType()
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| /openbsd-src/gnu/llvm/clang/lib/CodeGen/ |
| H A D | CGExpr.cpp | 1803 bool IsVector = true) { in MaybeConvertMatrixAddress() argument
1805 if (ArrayTy && IsVector) { in MaybeConvertMatrixAddress()
1812 if (VectorTy && !IsVector) { in MaybeConvertMatrixAddress()
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| H A D | TargetInfo.cpp | 7646 bool IsVector = false; in EmitVAArg() local
7658 IsVector = ArgTy->isVectorTy(); in EmitVAArg()
7663 if (IsVector && UnpaddedSize > PaddedSize) in EmitVAArg()
7673 if (IsVector) { in EmitVAArg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 478 bool parseDirectiveRegSave(SMLoc L, bool IsVector);
11747 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) { in parseDirectiveRegSave() argument
11761 if (!IsVector && !Op.isRegList()) in parseDirectiveRegSave()
11763 if (IsVector && !Op.isDPRRegList()) in parseDirectiveRegSave()
11766 getTargetStreamer().emitRegSave(Op.getRegList(), IsVector); in parseDirectiveRegSave()
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| /openbsd-src/gnu/llvm/clang/docs/ |
| H A D | InternalsManual.rst | 1798 bool IsVector;
|