| /openbsd-src/gnu/llvm/llvm/lib/Support/ |
| H A D | DivisionByConstantInfo.cpp | 81 Retval.IsAdd = false; // initialize "add" indicator in get() 110 Retval.IsAdd = true; in get() 120 Retval.IsAdd = true; in get() 134 if (Retval.IsAdd && !D[0] && AllowEvenDivisorOptimization) { in get() 139 assert(Retval.IsAdd == 0 && Retval.PreShift == 0); in get() 148 if (Retval.IsAdd) { in get()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARC/ |
| H A D | ARCFrameLowering.cpp | 452 unsigned Reg, int NumBytes, bool IsAdd, in emitRegUpdate() argument 456 Opc = IsAdd ? ARC::ADD_rru6 : ARC::SUB_rru6; in emitRegUpdate() 458 Opc = IsAdd ? ARC::ADD_rrs12 : ARC::SUB_rrs12; in emitRegUpdate() 460 Opc = IsAdd ? ARC::ADD_rrlimm : ARC::SUB_rrlimm; in emitRegUpdate() 484 bool IsAdd = (Old.getOpcode() == ARC::ADJCALLSTACKUP); in eliminateCallFramePseudoInstr() local 485 emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII); in eliminateCallFramePseudoInstr()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/Support/ |
| H A D | DivisionByConstantInfo.h | 33 bool IsAdd; ///< add indicator member
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Scalar/ |
| H A D | LoopFlatten.cpp | 200 bool IsAdd = match(U, m_c_Add(m_Specific(InnerInductionPHI), in matchLinearIVUser() local 230 if (Widened && IsAdd && in matchLinearIVUser() 242 if ((IsAdd || IsAddTrunc) && MatchedItCount == InnerTripCount) { in matchLinearIVUser()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 826 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64() local 849 unsigned Opc = OpcMap[0][N->isDivergent()][IsAdd]; in SelectADD_SUB_I64() 850 unsigned CarryOpc = OpcMap[1][N->isDivergent()][IsAdd]; in SelectADD_SUB_I64() 910 bool IsAdd = N->getOpcode() == ISD::UADDO; in SelectUADDO_USUBO() local 916 if ((IsAdd && (UI->getOpcode() != ISD::ADDCARRY)) || in SelectUADDO_USUBO() 917 (!IsAdd && (UI->getOpcode() != ISD::SUBCARRY))) { in SelectUADDO_USUBO() 924 unsigned Opc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in SelectUADDO_USUBO()
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| H A D | AMDGPUInstructionSelector.cpp | 413 const bool IsAdd = I.getOpcode() == AMDGPU::G_UADDO || in selectG_UADDO_USUBO_UADDE_USUBE() local 420 IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE() 421 unsigned CarryOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE() 436 unsigned NoCarryOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in selectG_UADDO_USUBO_UADDE_USUBE() 437 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
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| H A D | SIISelLowering.cpp | 4056 bool IsAdd = (MI.getOpcode() == AMDGPU::S_ADD_U64_PSEUDO); in EmitInstrWithCustomInserter() local 4058 unsigned LoOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in EmitInstrWithCustomInserter() 4059 unsigned HiOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in EmitInstrWithCustomInserter() 4077 bool IsAdd = (MI.getOpcode() == AMDGPU::V_ADD_U64_PSEUDO); in EmitInstrWithCustomInserter() local 4083 if (IsAdd && ST.hasLshlAddB64()) { in EmitInstrWithCustomInserter() 4124 unsigned LoOpc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in EmitInstrWithCustomInserter() 4131 unsigned HiOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in EmitInstrWithCustomInserter()
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| H A D | SIInstrInfo.cpp | 6895 bool IsAdd = (Inst.getOpcode() == AMDGPU::S_ADD_U64_PSEUDO); in splitScalar64BitAddSub() local 6932 unsigned LoOpc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in splitScalar64BitAddSub() 6940 unsigned HiOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in splitScalar64BitAddSub()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6979 const bool IsAdd = MI.getOpcode() == TargetOpcode::G_SADDO; in lowerSADDO_SSUBO() local 6984 if (IsAdd) in lowerSADDO_SSUBO() 7002 IsAdd ? CmpInst::ICMP_SLT : CmpInst::ICMP_SGT, BoolTy, RHS, Zero); in lowerSADDO_SSUBO() 7016 bool IsAdd; in lowerAddSubSatToMinMax() local 7023 IsAdd = true; in lowerAddSubSatToMinMax() 7028 IsAdd = true; in lowerAddSubSatToMinMax() 7033 IsAdd = false; in lowerAddSubSatToMinMax() 7038 IsAdd = false; in lowerAddSubSatToMinMax() 7060 if (IsAdd) { in lowerAddSubSatToMinMax() 7077 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax() [all …]
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| H A D | CombinerHelper.cpp | 4969 assert((!magics.IsAdd || magics.PreShift == 0) && "Unexpected pre-shift"); in buildUDivUsingMul() 4972 SelNPQ = magics.IsAdd; in buildUDivUsingMul()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 6075 assert((!magics.IsAdd || magics.PreShift == 0) && in BuildUDIV() 6080 magics.IsAdd ? APInt::getOneBitSet(EltBits, EltBits - 1) in BuildUDIV() 6083 UseNPQ |= magics.IsAdd; in BuildUDIV() 9890 bool IsAdd = Node->getOpcode() == ISD::UADDO; in expandUADDSUBO() local 9893 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY; in expandUADDSUBO() 9903 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandUADDSUBO() 9910 if (IsAdd && isOneConstant(RHS)) { in expandUADDSUBO() 9920 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in expandUADDSUBO() 9931 bool IsAdd = Node->getOpcode() == ISD::SADDO; in expandSADDSUBO() local 9933 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandSADDSUBO() [all …]
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| H A D | LegalizeDAG.cpp | 3486 bool IsAdd = Node->getOpcode() == ISD::ADDCARRY; in ExpandNode() local 3489 unsigned Op = IsAdd ? ISD::ADD : ISD::SUB; in ExpandNode() 3496 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in ExpandNode() 3511 IsAdd ? DAG.getSetCC(dl, SetCCType, Sum2, Zero, ISD::SETEQ) in ExpandNode()
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| H A D | DAGCombiner.cpp | 2340 bool IsAdd = N->getOpcode() == ISD::ADD; in foldAddSubBoolOfMaskedVal() local 2341 SDValue C = IsAdd ? N->getOperand(1) : N->getOperand(0); in foldAddSubBoolOfMaskedVal() 2342 SDValue Z = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubBoolOfMaskedVal() 2367 SDValue C1 = IsAdd ? DAG.getConstant(CN->getAPIntValue() + 1, DL, VT) : in foldAddSubBoolOfMaskedVal() 2369 return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, C1, LowBit); in foldAddSubBoolOfMaskedVal() 2380 bool IsAdd = N->getOpcode() == ISD::ADD; in foldAddSubOfSignBit() local 2381 SDValue ConstantOp = IsAdd ? N->getOperand(1) : N->getOperand(0); in foldAddSubOfSignBit() 2382 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubOfSignBit() 2404 IsAdd ? ISD::ADD : ISD::SUB, DL, VT, in foldAddSubOfSignBit() 2406 SDValue NewShift = DAG.getNode(IsAdd ? ISD::SRA : ISD::SRL, DL, VT, in foldAddSubOfSignBit() [all …]
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| H A D | LegalizeIntegerTypes.cpp | 4052 bool IsAdd = Node->getOpcode() == ISD::SADDO; in ExpandIntRes_SADDSUBO() local 4053 unsigned CarryOp = IsAdd ? ISD::SADDO_CARRY : ISD::SSUBO_CARRY; in ExpandIntRes_SADDSUBO() 4065 Lo = DAG.getNode(IsAdd ? ISD::UADDO : ISD::USUBO, dl, VTList, {LHSL, RHSL}); in ExpandIntRes_SADDSUBO() 4102 if (IsAdd) in ExpandIntRes_SADDSUBO()
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| /openbsd-src/gnu/llvm/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 1685 bool IsAdd = II->getIntrinsicID() == Intrinsic::uadd_sat; in computeKnownBitsFromOperator() local 1693 if (IsAdd) in computeKnownBitsFromOperator() 1701 IsAdd, /* NSW */ false, Known, Known2); in computeKnownBitsFromOperator() 1705 if (IsAdd) { in computeKnownBitsFromOperator()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7885 bool IsAdd = N->getOpcode() == ISD::UADDO; in ReplaceNodeResults() local 7890 DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, DL, MVT::i64, LHS, RHS); in ReplaceNodeResults() 7895 if (IsAdd && isOneConstant(RHS)) { in ReplaceNodeResults() 7909 IsAdd ? ISD::SETULT : ISD::SETUGT); in ReplaceNodeResults() 9808 bool IsAdd = N0.getOpcode() == ISD::ADD; in performSRACombine() local 9809 if ((IsAdd || N0.getOpcode() == ISD::SUB)) { in performSRACombine() 9811 AddC = dyn_cast<ConstantSDNode>(N0.getOperand(IsAdd ? 1 : 0)); in performSRACombine() 9829 Shl = N0.getOperand(IsAdd ? 0 : 1); in performSRACombine() 9855 if (IsAdd) in performSRACombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 1909 auto IsSignedSaturateLimit = [&](Value *Limit, bool IsAdd) { in foldOverflowingAddSubSelect() argument 1930 if (IsAdd) { in foldOverflowingAddSubSelect()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1030 bool IsAdd = ROOTNode->getOpcode() == ISD::ADD; in performMADD_MSUBCombine() local 1031 unsigned Opcode = IsAdd ? (IsUnsigned ? MipsISD::MAddu : MipsISD::MAdd) in performMADD_MSUBCombine()
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| /openbsd-src/gnu/llvm/clang/lib/Sema/ |
| H A D | SemaOpenMP.cpp | 8342 bool IsAdd = BO->getOpcode() == BO_Add; in checkAndSetIncRHS() local 8344 return setStep(BO->getRHS(), !IsAdd); in checkAndSetIncRHS() 8345 if (IsAdd && getInitLCDecl(BO->getRHS()) == LCDecl) in checkAndSetIncRHS() 8349 bool IsAdd = CE->getOperator() == OO_Plus; in checkAndSetIncRHS() local 8350 if ((IsAdd || CE->getOperator() == OO_Minus) && CE->getNumArgs() == 2) { in checkAndSetIncRHS() 8352 return setStep(CE->getArg(1), !IsAdd); in checkAndSetIncRHS() 8353 if (IsAdd && getInitLCDecl(CE->getArg(1)) == LCDecl) in checkAndSetIncRHS()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 17802 bool IsAdd = ((N.getOpcode() == ISD::ADD) || (N.getOpcode() == ISD::OR)); in setAlignFlagsForFI() local 17803 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(IsAdd ? N.getOperand(0) : N); in setAlignFlagsForFI() 17817 if (!IsAdd) { in setAlignFlagsForFI()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 17383 static SDValue foldOverflowCheck(SDNode *Op, SelectionDAG &DAG, bool IsAdd) { in foldOverflowCheck() argument 17388 if (IsAdd) { in foldOverflowCheck() 17396 SDValue CsetOp = CmpOp->getOperand(IsAdd ? 0 : 1); in foldOverflowCheck() 17398 if (CC != (IsAdd ? AArch64CC::HS : AArch64CC::LO)) in foldOverflowCheck()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 32701 bool IsAdd = Opc == ISD::ADDCARRY || Opc == ISD::SADDO_CARRY; in LowerADDSUBCARRY() local 32702 SDValue Sum = DAG.getNode(IsAdd ? X86ISD::ADC : X86ISD::SBB, DL, VTs, in LowerADDSUBCARRY() 51175 bool IsAdd = (Opcode == ISD::FADD) || (Opcode == ISD::ADD); in combineToHorizontalAddSub() local 51185 auto HorizOpcode = IsAdd ? X86ISD::FHADD : X86ISD::FHSUB; in combineToHorizontalAddSub() 51186 if (isHorizontalBinOp(HorizOpcode, LHS, RHS, DAG, Subtarget, IsAdd, in combineToHorizontalAddSub() 51202 auto HorizOpcode = IsAdd ? X86ISD::HADD : X86ISD::HSUB; in combineToHorizontalAddSub() 51203 if (isHorizontalBinOp(HorizOpcode, LHS, RHS, DAG, Subtarget, IsAdd, in combineToHorizontalAddSub()
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