| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 155 AArch64CC::CondCode &CondCode2, bool &Invert) { in changeVectorFCMPPredToAArch64CC() argument
156 Invert = false; in changeVectorFCMPPredToAArch64CC()
163 Invert = true; in changeVectorFCMPPredToAArch64CC()
176 Invert = true; in changeVectorFCMPPredToAArch64CC()
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| H A D | AArch64GlobalISelUtils.h | 76 bool &Invert);
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| H A D | AArch64PostLegalizerLowering.cpp | 975 bool Invert = false; in lowerVectorFCMP() local
985 changeVectorFCMPPredToAArch64CC(Pred, CC, CC2, Invert); in lowerVectorFCMP()
1001 if (Invert) in lowerVectorFCMP()
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| H A D | AArch64InstructionSelector.cpp | 129 bool tryOptAndIntoCompareBranch(MachineInstr &AndInst, bool Invert,
1136 bool Invert) { in emitSelect() argument
1151 if (Invert) { in emitSelect()
1168 if (Invert) { in emitSelect()
1187 if (Invert) { in emitSelect()
1392 static Register getTestBitReg(Register Reg, uint64_t &Bit, bool &Invert, in getTestBitReg() argument
1509 Invert = !Invert; in getTestBitReg()
1557 MachineInstr &AndInst, bool Invert, MachineBasicBlock *DstMBB, in tryOptAndIntoCompareBranch() argument
1593 emitTestBit(TestReg, Bit, Invert, DstMBB, MIB); in tryOptAndIntoCompareBranch()
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| /openbsd-src/gnu/llvm/lld/MachO/ |
| H A D | EhFrame.cpp | 108 template <bool Invert = false>
115 if (Invert) in createSubtraction()
121 (Invert ? 1 : -1) * off, minuend); in createSubtraction()
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| H A D | InputFiles.cpp | 1317 template <bool Invert = false>
1335 if (Invert) in targetSymFromCanonicalSubtractor()
1338 if (pcSym->value - (Invert ? -1 : 1) * minuend.addend != subtrahend.offset) in targetSymFromCanonicalSubtractor()
1347 macho::Reloc &pcReloc = Invert ? minuend : subtrahend; in targetSymFromCanonicalSubtractor()
1350 minuend.addend = pcReloc.offset * (Invert ? 1LL : -1LL); in targetSymFromCanonicalSubtractor()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 497 bool Invert = !DefMI; in optimizeSelect() local
504 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect()
521 if (Invert) in optimizeSelect()
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| H A D | LanaiISelLowering.cpp | 1348 bool &Invert, SDValue &OtherOp, in isConditionalZeroOrAllOnes() argument
1358 Invert = false; in isConditionalZeroOrAllOnes()
1363 Invert = true; in isConditionalZeroOrAllOnes()
1379 Invert = true; in isConditionalZeroOrAllOnes()
1388 Invert = !AllOnes; in isConditionalZeroOrAllOnes()
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| H A D | LanaiInstrFormats.td | 301 // (the `I' (Invert sense) bit inverts the sense of the condition):
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Scalar/ |
| H A D | StructurizeCFG.cpp | 273 Value *buildCondition(BranchInst *Term, unsigned Idx, bool Invert);
453 bool Invert) { in buildCondition() argument
454 Value *Cond = Invert ? BoolFalse : BoolTrue; in buildCondition()
458 if (Idx != (unsigned)Invert) in buildCondition()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombinePHI.cpp | 1332 std::optional<bool> Invert; in simplifyUsingControlFlow() local
1356 if (Invert && *Invert != NeedsInvert) in simplifyUsingControlFlow()
1359 Invert = NeedsInvert; in simplifyUsingControlFlow()
1362 if (!*Invert) in simplifyUsingControlFlow()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 219 bool Invert) const override;
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| H A D | RISCVInstrInfo.cpp | 1139 bool Invert = !DefMI; in optimizeSelect() local
1146 MachineOperand FalseReg = MI.getOperand(Invert ? 5 : 4); in optimizeSelect()
1165 if (Invert) in optimizeSelect()
1352 bool Invert) const { in isAssociativeAndCommutative()
1354 if (Invert) { in isAssociativeAndCommutative()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 731 bool Invert) const;
739 bool Invert = false) const;
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| H A D | SystemZISelLowering.cpp | 2951 bool &Invert) { in getVectorComparisonOrInvert() argument
2953 Invert = false; in getVectorComparisonOrInvert()
2959 Invert = true; in getVectorComparisonOrInvert()
3034 bool Invert = false; in lowerVectorSETCC() local
3039 Invert = true; in lowerVectorSETCC()
3056 Invert = true; in lowerVectorSETCC()
3075 if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert)) in lowerVectorSETCC()
3079 if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert)) in lowerVectorSETCC()
3088 if (Invert) { in lowerVectorSETCC()
6919 bool Invert = false; in combineCCMask() local
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsCallingConv.td | 12 class CCIfSubtarget<string F, CCAction A, string Invert = "">
13 : CCIf<!strconcat(Invert,
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| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1169 bool Invert = false; in LowerSETCC() local
1181 Invert = true; in LowerSETCC()
1189 Invert = true; in LowerSETCC()
1207 if (Invert) in LowerSETCC()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 512 bool Invert) const override;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 268 bool Invert) const override;
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| H A D | AArch64ISelLowering.cpp | 2974 bool &Invert) { in changeVectorFPCCToAArch64CC() argument
2975 Invert = false; in changeVectorFPCCToAArch64CC()
2982 Invert = true; in changeVectorFPCCToAArch64CC()
2995 Invert = true; in changeVectorFPCCToAArch64CC()
3728 static SDValue valueToCarryFlag(SDValue Value, SelectionDAG &DAG, bool Invert) { in valueToCarryFlag() argument
3731 SDValue Op0 = Invert ? DAG.getConstant(0, DL, VT) : Value; in valueToCarryFlag()
3732 SDValue Op1 = Invert ? Value : DAG.getConstant(1, DL, VT); in valueToCarryFlag()
3741 bool Invert) { in carryFlagToValue() argument
3746 unsigned Cond = Invert ? AArch64CC::LO : AArch64CC::HS; in carryFlagToValue()
20414 static SDValue getTestBitOperand(SDValue Op, unsigned &Bit, bool &Invert, in getTestBitOperand() argument
[all …]
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| /openbsd-src/gnu/gcc/gcc/config/rs6000/ |
| H A D | predicates.md | 491 /* Invert to look for a second transition. */
575 /* Invert to look for a second transition. */
584 /* Invert to look for a third transition. */
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 502 bool Invert) const override;
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| H A D | PPCISelDAGToDAG.cpp | 4172 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert) { in getCRIdxForSetCC() argument
4173 Invert = false; in getCRIdxForSetCC()
4184 case ISD::SETGE: Invert = true; return 0; // !Bit #0 = SETUGE in getCRIdxForSetCC()
4186 case ISD::SETLE: Invert = true; return 1; // !Bit #1 = SETULE in getCRIdxForSetCC()
4188 case ISD::SETNE: Invert = true; return 2; // !Bit #2 = SETUNE in getCRIdxForSetCC()
4189 case ISD::SETO: Invert = true; return 3; // !Bit #3 = SETO in getCRIdxForSetCC()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 2870 bool Invert = false; in SpeculativelyExecuteBB() local
2873 Invert = true; in SpeculativelyExecuteBB()
2875 assert(EndBB == BI->getSuccessor(!Invert) && "No edge from to end block"); in SpeculativelyExecuteBB()
2883 uint64_t EndWeight = Invert ? TWeight : FWeight; in SpeculativelyExecuteBB()
2989 if (Invert) in SpeculativelyExecuteBB()
3068 if (Invert) in SpeculativelyExecuteBB()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1188 bool Invert = false) const {
|