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Searched refs:IntID (Results 1 – 19 of 19) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonMapAsm2IntrinV62.gen.td9 multiclass T_VR_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
12 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, IntRegs:$src2),
16 multiclass T_VVL_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
17 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2, IntRegsLow8:$src3),
19 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, HvxVR:$src2,
24 multiclass T_VV_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
27 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, HvxVR:$src2),
31 multiclass T_WW_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
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H A DHexagonIntrinsicsV60.td84 multiclass T_R_pat <InstHexagon MI, Intrinsic IntID> {
85 def: Pat<(IntID IntRegs:$src1), (MI IntRegs:$src1)>;
86 def: Pat<(!cast<Intrinsic>(IntID#"_128B") IntRegs:$src1),
90 multiclass T_V_pat <InstHexagon MI, Intrinsic IntID> {
91 def: Pat<(IntID HvxVR:$src1),
94 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1),
98 multiclass T_W_pat <InstHexagon MI, Intrinsic IntID> {
99 def: Pat<(IntID HvxWR:$src1),
102 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxWR:$src1),
106 multiclass T_Q_pat <InstHexagon MI, Intrinsic IntID> {
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H A DHexagonIntrinsics.td11 class T_R_pat <InstHexagon MI, Intrinsic IntID>
12 : Pat <(IntID I32:$Rs),
15 class T_RR_pat <InstHexagon MI, Intrinsic IntID>
16 : Pat <(IntID I32:$Rs, I32:$Rt),
19 class T_RP_pat <InstHexagon MI, Intrinsic IntID>
20 : Pat <(IntID I32:$Rs, I64:$Rt),
143 class S2op_tableidx_pat <Intrinsic IntID, InstHexagon OutputInst,
145 : Pat <(IntID I32:$src1, I32:$src2, u4_0ImmPred_timm:$src3, u5_0ImmPred_timm:$src4),
186 class T_stb_pat <InstHexagon MI, Intrinsic IntID, PatLeaf Val>
187 : Pat<(IntID I32:$Rs, Val:$Rt, I32:$Ru),
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H A DHexagonOptimizeSZextends.cpp47 bool intrinsicAlreadySextended(Intrinsic::ID IntID);
56 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended() argument
57 switch(IntID) { in intrinsicAlreadySextended()
H A DHexagonVectorCombine.cpp126 Value *createHvxIntrinsic(IRBuilderBase &Builder, Intrinsic::ID IntID,
2136 Intrinsic::ID IntID, Type *RetTy, in createHvxIntrinsic() argument
2163 Function *IntrFn = Intrinsic::getDeclaration(F.getParent(), IntID, ArgTys); in createHvxIntrinsic()
H A DHexagonISelLowering.cpp3837 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_L2_loadw_locked in emitLoadLinked() local
3839 Function *Fn = Intrinsic::getDeclaration(M, IntID); in emitLoadLinked()
3863 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_S2_storew_locked in emitStoreConditional() local
3865 Function *Fn = Intrinsic::getDeclaration(M, IntID); in emitStoreConditional()
/openbsd-src/gnu/llvm/llvm/lib/Transforms/ObjCARC/
H A DARCRuntimeEntryPoints.h138 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint() argument
142 return Decl = Intrinsic::getDeclaration(TheModule, IntID); in getIntrinsicEntryPoint()
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCInstrAltivec.td268 class VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty>
271 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>;
275 class VA1a_Int_Ty2<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy,
279 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>;
283 class VA1a_Int_Ty3<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy,
288 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>;
291 class VX1_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty>
294 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>;
298 class VX1_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy,
302 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>;
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H A DPPCISelDAGToDAG.cpp5155 auto IntID = N->getConstantOperandVal(0); in Select() local
5156 if (IntID == Intrinsic::ppc_fsels) { in Select()
5162 if (IntID == Intrinsic::ppc_bcdadd_p || IntID == Intrinsic::ppc_bcdsub_p) { in Select()
5165 IntID == Intrinsic::ppc_bcdadd_p ? PPC::BCDADD_rec : PPC::BCDSUB_rec; in Select()
5242 switch (IntID) { in Select()
/openbsd-src/gnu/llvm/clang/lib/CodeGen/
H A DCGObjC.cpp2168 static llvm::Function *getARCIntrinsic(llvm::Intrinsic::ID IntID, in getARCIntrinsic() argument
2170 llvm::Function *fn = CGM.getIntrinsic(IntID); in getARCIntrinsic()
2180 llvm::Function *&fn, llvm::Intrinsic::ID IntID, in emitARCValueOperation() argument
2186 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCValueOperation()
2204 llvm::Intrinsic::ID IntID) { in emitARCLoadOperation() argument
2206 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCLoadOperation()
2227 llvm::Intrinsic::ID IntID, in emitARCStoreOperation() argument
2232 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCStoreOperation()
2251 llvm::Intrinsic::ID IntID) { in emitARCCopyOperation() argument
2255 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCCopyOperation()
H A DCodeGenFunction.h4227 unsigned IntID);
4230 unsigned IntID);
4242 unsigned IntID);
4245 unsigned IntID);
4248 unsigned IntID);
H A DCGBuiltin.cpp7531 llvm::Type *ResTy, unsigned IntID, in packTBLDVectorList() argument
7563 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); in packTBLDVectorList()
8936 unsigned IntID; in EmitSVEPredicateCast() local
8944 IntID = Intrinsic::aarch64_sve_convert_from_svbool; in EmitSVEPredicateCast()
8948 IntID = Intrinsic::aarch64_sve_convert_to_svbool; in EmitSVEPredicateCast()
8953 Function *F = CGM.getIntrinsic(IntID, IntrinsicTy); in EmitSVEPredicateCast()
8961 unsigned IntID) { in EmitSVEGatherLoad() argument
8978 F = CGM.getIntrinsic(IntID, {OverloadedTy, Ops[1]->getType()}); in EmitSVEGatherLoad()
8984 F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEGatherLoad()
9012 unsigned IntID) { in EmitSVEScatterStore() argument
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/openbsd-src/gnu/llvm/llvm/include/llvm/IR/
H A DGlobalValue.h169 Intrinsic::ID IntID = (Intrinsic::ID)0U;
H A DFunction.h204 Intrinsic::ID getIntrinsicID() const LLVM_READONLY { return IntID; } in getIntrinsicID()
/openbsd-src/gnu/llvm/llvm/lib/IR/
H A DFunction.cpp420 if (IntID) in Function()
421 setAttributes(Intrinsic::getAttributes(getContext(), IntID)); in Function()
832 return isTargetIntrinsic(IntID); in isTargetIntrinsic()
880 IntID = Intrinsic::not_intrinsic; in recalculateIntrinsicID()
884 IntID = lookupIntrinsicID(Name); in recalculateIntrinsicID()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp3214 SDValue IntID = in lowerVECTOR_SHUFFLE() local
3217 IntID, in lowerVECTOR_SHUFFLE()
5742 SDValue IntID = DAG.getTargetConstant( in LowerINTRINSIC_W_CHAIN() local
5746 SmallVector<SDValue, 8> Ops{Load->getChain(), IntID}; in LowerINTRINSIC_W_CHAIN()
5792 SDValue IntID = DAG.getTargetConstant(VlsegInts[NF - 2], DL, XLenVT); in LowerINTRINSIC_W_CHAIN() local
5797 SmallVector<SDValue, 12> Ops = {Load->getChain(), IntID}; in LowerINTRINSIC_W_CHAIN()
5846 SDValue IntID = DAG.getTargetConstant( in LowerINTRINSIC_VOID() local
5851 SmallVector<SDValue, 8> Ops{Store->getChain(), IntID}; in LowerINTRINSIC_VOID()
6604 SDValue IntID = DAG.getTargetConstant( in lowerFixedLengthVectorLoadToRVV() local
6606 SmallVector<SDValue, 4> Ops{Load->getChain(), IntID}; in lowerFixedLengthVectorLoadToRVV()
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H A DRISCVISelDAGToDAG.cpp120 SDValue IntID = in PreprocessISelDAG() local
123 IntID, in PreprocessISelDAG()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp2179 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in computeKnownBitsForTargetNode() local
2180 switch (IntID) { in computeKnownBitsForTargetNode()
22200 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in ReplaceNodeResults() local
22201 switch (IntID) { in ReplaceNodeResults()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp19876 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in computeKnownBitsForTargetNode() local
19877 switch (IntID) { in computeKnownBitsForTargetNode()