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Searched refs:Instr (Results 1 – 25 of 153) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/tools/llvm-cfi-verify/lib/
H A DFileAnalysis.h78 struct Instr { struct
98 const Instr *getInstruction(uint64_t Address) const;
102 const Instr &getInstructionOrDie(uint64_t Address) const;
107 const Instr *getPrevInstructionSequential(const Instr &InstrMeta) const;
108 const Instr *getNextInstructionSequential(const Instr &InstrMeta) const;
111 bool isCFITrap(const Instr &InstrMeta) const;
115 bool willTrapOnCFIViolation(const Instr &InstrMeta) const;
121 bool canFallThrough(const Instr &InstrMeta) const;
130 const Instr *getDefiniteNextInstruction(const Instr &InstrMeta) const;
135 std::set<const Instr *>
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H A DFileAnalysis.cpp39 using Instr = llvm::cfi_verify::FileAnalysis::Instr; typedef
125 const Instr *
126 FileAnalysis::getPrevInstructionSequential(const Instr &InstrMeta) const { in getPrevInstructionSequential()
127 std::map<uint64_t, Instr>::const_iterator KV = in getPrevInstructionSequential()
138 const Instr *
139 FileAnalysis::getNextInstructionSequential(const Instr &InstrMeta) const { in getNextInstructionSequential()
140 std::map<uint64_t, Instr>::const_iterator KV = in getNextInstructionSequential()
151 bool FileAnalysis::usesRegisterOperand(const Instr &InstrMeta) const { in usesRegisterOperand()
159 const Instr *FileAnalysis::getInstruction(uint64_t Address) const { in getInstruction()
167 const Instr &FileAnalysis::getInstructionOrDie(uint64_t Address) const { in getInstructionOrDie()
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/openbsd-src/gnu/llvm/llvm/lib/Transforms/Scalar/
H A DCorrelatedValuePropagation.cpp708 static bool narrowSDivOrSRem(BinaryOperator *Instr, const ConstantRange &LCR, in narrowSDivOrSRem() argument
710 assert(Instr->getOpcode() == Instruction::SDiv || in narrowSDivOrSRem()
711 Instr->getOpcode() == Instruction::SRem); in narrowSDivOrSRem()
712 assert(!Instr->getType()->isVectorTy()); in narrowSDivOrSRem()
716 unsigned OrigWidth = Instr->getType()->getIntegerBitWidth(); in narrowSDivOrSRem()
739 IRBuilder<> B{Instr}; in narrowSDivOrSRem()
740 auto *TruncTy = Type::getIntNTy(Instr->getContext(), NewWidth); in narrowSDivOrSRem()
741 auto *LHS = B.CreateTruncOrBitCast(Instr->getOperand(0), TruncTy, in narrowSDivOrSRem()
742 Instr->getName() + ".lhs.trunc"); in narrowSDivOrSRem()
743 auto *RHS = B.CreateTruncOrBitCast(Instr->getOperand(1), TruncTy, in narrowSDivOrSRem()
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H A DGuardWidening.cpp141 Instruction *Instr, const df_iterator<DomTreeNode *> &DFSI,
333 Instruction *Instr, const df_iterator<DomTreeNode *> &DFSI, in eliminateInstrViaWidening() argument
339 if (isa<ConstantInt>(getCondition(Instr))) in eliminateInstrViaWidening()
355 auto E = Instr->getParent() == CurBB ? find(GuardsInCurBB, Instr) in eliminateInstrViaWidening()
372 assert((i == (e - 1)) == (Instr->getParent() == CurBB) && "Bad DFS?"); in eliminateInstrViaWidening()
375 auto Score = computeWideningScore(Instr, Candidate, InvertCondition); in eliminateInstrViaWidening()
376 LLVM_DEBUG(dbgs() << "Score between " << *getCondition(Instr) in eliminateInstrViaWidening()
387 LLVM_DEBUG(dbgs() << "Did not eliminate guard " << *Instr << "\n"); in eliminateInstrViaWidening()
391 assert(BestSoFar != Instr && "Should have never visited same guard!"); in eliminateInstrViaWidening()
392 assert(DT.dominates(BestSoFar, Instr) && "Should be!"); in eliminateInstrViaWidening()
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/openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/
H A DCodeTemplate.cpp27 InstructionTemplate::InstructionTemplate(const Instruction *Instr) in InstructionTemplate() argument
28 : Instr(Instr), VariableValues(Instr->Variables.size()) {} in InstructionTemplate()
41 return Instr->Description.getOpcode(); in getOpcode()
53 return getValueFor(Instr->Variables[Op.getVariableIndex()]); in getValueFor()
57 return getValueFor(Instr->Variables[Op.getVariableIndex()]); in getValueFor()
61 return any_of(Instr->Variables, [this](const Variable &Var) { in hasImmediateVariables()
62 return Instr->getPrimaryOperand(Var).isImmediate(); in hasImmediateVariables()
68 Result.setOpcode(Instr->Description.Opcode); in build()
69 for (const auto &Op : Instr->Operands) in build()
H A DSerialSnippetGenerator.cpp38 computeAliasingInstructions(const LLVMState &State, const Instruction *Instr, in computeAliasingInstructions() argument
49 if (OtherOpcode == Instr->Description.getOpcode()) in computeAliasingInstructions()
63 if (Instr->hasAliasingRegistersThrough(OtherInstr, ForbiddenRegisters)) in computeAliasingInstructions()
71 static ExecutionMode getExecutionModes(const Instruction &Instr, in getExecutionModes() argument
74 if (Instr.hasAliasingImplicitRegisters()) in getExecutionModes()
76 if (Instr.hasTiedRegisters()) in getExecutionModes()
78 if (Instr.hasMemoryOperands()) in getExecutionModes()
81 if (Instr.hasAliasingRegisters(ForbiddenRegisters)) in getExecutionModes()
83 if (Instr.hasOneUseOrOneDef()) in getExecutionModes()
133 const Instruction &Instr = Variant.getInstr(); in appendCodeTemplates() local
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H A DParallelSnippetGenerator.cpp82 static bool hasVariablesWithTiedOperands(const Instruction &Instr) { in hasVariablesWithTiedOperands() argument
84 for (const auto &Var : Instr.Variables) in hasVariablesWithTiedOperands()
152 const Instruction &Instr = IT.getInstr(); in generateSingleRegisterForInstrAvoidingDefUseOverlap() local
197 Instr.Variables[Op.getVariableIndex()].hasTiedOperands(); in generateSingleRegisterForInstrAvoidingDefUseOverlap()
220 const Instruction &Instr = IT.getInstr(); in generateSingleSnippetForInstrAvoidingDefUseOverlap() local
221 for (const Operand &Op : Instr.Operands) { in generateSingleSnippetForInstrAvoidingDefUseOverlap()
297 const Instruction &Instr = Variant.getInstr(); in generateCodeTemplates() local
300 Instr.hasMemoryOperands() in generateCodeTemplates()
304 const AliasingConfigurations SelfAliasing(Instr, Instr, ForbiddenRegisters); in generateCodeTemplates()
318 bool HasTiedOperands = hasVariablesWithTiedOperands(Instr); in generateCodeTemplates()
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMFeatures.h21 bool IsCPSRDead(const InstrType *Instr);
24 inline bool isV8EligibleForIT(const InstrType *Instr) { in isV8EligibleForIT() argument
25 switch (Instr->getOpcode()) { in isV8EligibleForIT()
52 return IsCPSRDead(Instr); in isV8EligibleForIT()
79 return Instr->getOperand(2).getReg() != ARM::PC; in isV8EligibleForIT()
84 return Instr->getOperand(0).getReg() != ARM::PC; in isV8EligibleForIT()
86 return Instr->getOperand(0).getReg() != ARM::PC && in isV8EligibleForIT()
87 Instr->getOperand(2).getReg() != ARM::PC; in isV8EligibleForIT()
90 return Instr->getOperand(0).getReg() != ARM::PC && in isV8EligibleForIT()
91 Instr->getOperand(1).getReg() != ARM::PC; in isV8EligibleForIT()
H A DMVETPAndVPTOptimisationsPass.cpp76 MachineInstr &Instr,
574 static ARMCC::CondCodes GetCondCode(MachineInstr &Instr) { in GetCondCode() argument
575 assert(IsVCMP(Instr.getOpcode()) && "Inst must be a VCMP"); in GetCondCode()
576 return ARMCC::CondCodes(Instr.getOperand(3).getImm()); in GetCondCode()
607 static bool IsWritingToVCCR(MachineInstr &Instr) { in IsWritingToVCCR() argument
608 if (Instr.getNumOperands() == 0) in IsWritingToVCCR()
610 MachineOperand &Dst = Instr.getOperand(0); in IsWritingToVCCR()
616 MachineRegisterInfo &RegInfo = Instr.getMF()->getRegInfo(); in IsWritingToVCCR()
630 MachineBasicBlock &MBB, MachineInstr &Instr, MachineOperand &User, in ReplaceRegisterUseWithVPNOT() argument
635 BuildMI(MBB, &Instr, Instr.getDebugLoc(), TII->get(ARM::MVE_VPNOT)) in ReplaceRegisterUseWithVPNOT()
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/openbsd-src/gnu/llvm/llvm/lib/ExecutionEngine/JITLink/
H A DELF_aarch64.cpp189 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
190 if (!aarch64::isLoadStoreImm12(Instr) || in addSingleRelocation()
191 aarch64::getPageOffset12Shift(Instr) != 0) in addSingleRelocation()
200 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
201 if (!aarch64::isLoadStoreImm12(Instr) || in addSingleRelocation()
202 aarch64::getPageOffset12Shift(Instr) != 1) in addSingleRelocation()
211 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
212 if (!aarch64::isLoadStoreImm12(Instr) || in addSingleRelocation()
213 aarch64::getPageOffset12Shift(Instr) != 2) in addSingleRelocation()
222 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
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/openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/X86/
H A DTarget.cpp63 static const char *isInvalidMemoryInstr(const Instruction &Instr) { in isInvalidMemoryInstr() argument
64 switch (Instr.Description.TSFlags & X86II::FormMask) { in isInvalidMemoryInstr()
163 return (Instr.Description.Opcode == X86::POP16r || in isInvalidMemoryInstr()
164 Instr.Description.Opcode == X86::POP32r || in isInvalidMemoryInstr()
165 Instr.Description.Opcode == X86::PUSH16r || in isInvalidMemoryInstr()
166 Instr.Description.Opcode == X86::PUSH32r) in isInvalidMemoryInstr()
198 static const char *isInvalidOpcode(const Instruction &Instr) { in isInvalidOpcode() argument
199 const auto OpcodeName = Instr.Name; in isInvalidOpcode()
200 if ((Instr.Description.TSFlags & X86II::FormMask) == X86II::Pseudo) in isInvalidOpcode()
206 switch (Instr.Description.Opcode) { in isInvalidOpcode()
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/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600OptimizeVectorRegisters.cpp51 MachineInstr *Instr; member in __anon62c3a9ae0111::RegSeqInfo
55 RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) { in RegSeqInfo()
57 for (unsigned i = 1, e = Instr->getNumOperands(); i < e; i+=2) { in RegSeqInfo()
58 MachineOperand &MO = Instr->getOperand(i); in RegSeqInfo()
59 unsigned Chan = Instr->getOperand(i + 1).getImm(); in RegSeqInfo()
70 return RSI.Instr == Instr; in operator ==()
184 Register Reg = RSI->Instr->getOperand(0).getReg(); in RebuildVector()
185 MachineBasicBlock::iterator Pos = RSI->Instr; in RebuildVector()
189 Register SrcVec = BaseRSI->Instr->getOperand(0).getReg(); in RebuildVector()
224 RSI->Instr->eraseFromParent(); in RebuildVector()
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/openbsd-src/gnu/llvm/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDagPredicate.cpp27 GIMatchDagContext &Ctx, StringRef Name, const CodeGenInstruction &Instr) in GIMatchDagOpcodePredicate() argument
30 Instr(Instr) {} in GIMatchDagOpcodePredicate()
33 OS << "$mi.getOpcode() == " << Instr.TheDef->getName(); in printDescription()
44 for (const CodeGenInstruction *Instr : Instrs) { in printDescription() local
45 OS << Separator << Instr->TheDef->getName(); in printDescription()
H A DGIMatchDagPredicate.h84 const CodeGenInstruction &Instr; variable
88 const CodeGenInstruction &Instr);
94 const CodeGenInstruction *getInstr() const { return &Instr; } in getInstr()
109 void addOpcode(const CodeGenInstruction *Instr) { Instrs.push_back(Instr); } in addOpcode() argument
/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp90 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust() argument
94 if (isRMOpcode(Instr.getOpcode())) in PostOperandDecodeAdjust()
96 else if (isSPLSOpcode(Instr.getOpcode())) in PostOperandDecodeAdjust()
98 else if (isRRMOpcode(Instr.getOpcode())) { in PostOperandDecodeAdjust()
112 if (Instr.getOperand(2).isReg()) { in PostOperandDecodeAdjust()
113 Instr.getOperand(2).setReg(Lanai::R0); in PostOperandDecodeAdjust()
115 if (Instr.getOperand(2).isImm()) in PostOperandDecodeAdjust()
116 Instr.getOperand(2).setImm(0); in PostOperandDecodeAdjust()
127 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust()
132 LanaiDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, in getInstruction() argument
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/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/
H A DWebAssemblyDebugValueManager.cpp22 MachineInstr *Instr) { in WebAssemblyDebugValueManager() argument
25 if (!Instr->getOperand(0).isReg()) in WebAssemblyDebugValueManager()
27 CurrentReg = Instr->getOperand(0).getReg(); in WebAssemblyDebugValueManager()
29 MachineBasicBlock::iterator DI = *Instr; in WebAssemblyDebugValueManager()
31 for (MachineBasicBlock::iterator DE = Instr->getParent()->end(); DI != DE; in WebAssemblyDebugValueManager()
34 DI->hasDebugOperandForReg(Instr->getOperand(0).getReg())) in WebAssemblyDebugValueManager()
/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp69 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
166 DecodeStatus BPFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, in getInstruction() argument
183 Result = decodeInstruction(DecoderTableBPFALU3264, Instr, Insn, Address, in getInstruction()
186 Result = decodeInstruction(DecoderTableBPF64, Instr, Insn, Address, this, in getInstruction()
191 switch (Instr.getOpcode()) { in getInstruction()
203 auto& Op = Instr.getOperand(1); in getInstruction()
213 auto Op = Instr.getOperand(0); in getInstruction()
214 Instr.clear(); in getInstruction()
215 Instr.addOperand(MCOperand::createReg(BPF::R6)); in getInstruction()
216 Instr.addOperand(Op); in getInstruction()
/openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/
H A DVectorUtils.h629 InterleaveGroup(InstTy *Instr, int32_t Stride, Align Alignment) in InterleaveGroup() argument
630 : Alignment(Alignment), InsertPos(Instr) { in InterleaveGroup()
635 Members[0] = Instr; in InterleaveGroup()
648 bool insertMember(InstTy *Instr, int32_t Index, Align NewAlign) { in insertMember() argument
686 Members[Key] = Instr; in insertMember()
700 uint32_t getIndex(const InstTy *Instr) const { in getIndex() argument
702 if (I.second == Instr) in getIndex()
802 bool isInterleaved(Instruction *Instr) const { in isInterleaved() argument
803 return InterleaveGroupMap.find(Instr) != InterleaveGroupMap.end(); in isInterleaved()
810 getInterleaveGroup(const Instruction *Instr) const { in getInterleaveGroup() argument
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DDbgEntityHistoryCalculator.h78 Entry(const MachineInstr *Instr, EntryKind Kind) in Entry() argument
79 : Instr(Instr, Kind), EndIndex(NoEntry) {} in Entry()
81 const MachineInstr *getInstr() const { return Instr.getPointer(); } in getInstr()
83 EntryKind getEntryKind() const { return Instr.getInt(); } in getEntryKind()
92 PointerIntPair<const MachineInstr *, 1, EntryKind> Instr;
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64PromoteConstant.cpp272 static bool shouldConvertUse(const Constant *Cst, const Instruction *Instr, in shouldConvertUse() argument
276 if (isa<const ShuffleVectorInst>(Instr) && OpIdx == 2) in shouldConvertUse()
280 if (isa<const ExtractValueInst>(Instr) && OpIdx > 0) in shouldConvertUse()
284 if (isa<const InsertValueInst>(Instr) && OpIdx > 1) in shouldConvertUse()
287 if (isa<const AllocaInst>(Instr) && OpIdx > 0) in shouldConvertUse()
291 if (isa<const LoadInst>(Instr) && OpIdx > 0) in shouldConvertUse()
295 if (isa<const StoreInst>(Instr) && OpIdx > 1) in shouldConvertUse()
299 if (isa<const GetElementPtrInst>(Instr) && OpIdx > 0) in shouldConvertUse()
304 if (isa<const LandingPadInst>(Instr)) in shouldConvertUse()
308 if (isa<const SwitchInst>(Instr)) in shouldConvertUse()
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DRemoveRedundantDebugValues.cpp138 for (auto &Instr : DbgValsToBeRemoved) { in reduceDbgValsForwardScan() local
139 LLVM_DEBUG(dbgs() << "removing "; Instr->dump()); in reduceDbgValsForwardScan()
140 Instr->eraseFromParent(); in reduceDbgValsForwardScan()
193 for (auto &Instr : DbgValsToBeRemoved) { in reduceDbgValsBackwardScan() local
194 LLVM_DEBUG(dbgs() << "removing "; Instr->dump()); in reduceDbgValsBackwardScan()
195 Instr->eraseFromParent(); in reduceDbgValsBackwardScan()
H A DMachineUniformityAnalysis.cpp34 const MachineInstr &Instr, bool AllDefsDivergent) { in markDefsDivergent() argument
38 for (auto &op : Instr.operands()) { in markDefsDivergent()
87 const MachineInstr &Instr) { in pushUsers() argument
88 assert(!isAlwaysUniform(Instr)); in pushUsers()
89 if (Instr.isTerminator()) in pushUsers()
91 for (const MachineOperand &op : Instr.operands()) { in pushUsers()
/openbsd-src/gnu/llvm/llvm/lib/Analysis/
H A DUniformityAnalysis.cpp29 const Instruction &Instr, bool AllDefsDivergent) { in markDefsDivergent() argument
30 return markDivergent(&Instr); in markDefsDivergent()
66 const Instruction &Instr) { in pushUsers() argument
67 assert(!isAlwaysUniform(Instr)); in pushUsers()
68 if (Instr.isTerminator()) in pushUsers()
70 pushUsers(cast<Value>(&Instr)); in pushUsers()
/openbsd-src/gnu/llvm/llvm/include/llvm/ExecutionEngine/JITLink/
H A Daarch64.h297 inline bool isLoadStoreImm12(uint32_t Instr) { in isLoadStoreImm12() argument
299 return (Instr & LoadStoreImm12Mask) == 0x39000000; in isLoadStoreImm12()
308 inline unsigned getPageOffset12Shift(uint32_t Instr) { in getPageOffset12Shift() argument
311 if (isLoadStoreImm12(Instr)) { in getPageOffset12Shift()
312 uint32_t ImplicitShift = Instr >> 30; in getPageOffset12Shift()
314 if ((Instr & Vec128Mask) == Vec128Mask) in getPageOffset12Shift()
324 inline bool isMoveWideImm16(uint32_t Instr) { in isMoveWideImm16() argument
326 return (Instr & MoveWideImm16Mask) == 0x52800000; in isMoveWideImm16()
333 inline unsigned getMoveWide16Shift(uint32_t Instr) { in getMoveWide16Shift() argument
334 if (isMoveWideImm16(Instr)) { in getMoveWide16Shift()
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/openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/
H A DNVPTXImageOptimizer.cpp63 for (Instruction &Instr : BB) { in runOnFunction()
64 if (CallInst *CI = dyn_cast<CallInst>(&Instr)) { in runOnFunction()
71 Changed |= replaceIsTypePSampler(Instr); in runOnFunction()
74 Changed |= replaceIsTypePSurface(Instr); in runOnFunction()
77 Changed |= replaceIsTypePTexture(Instr); in runOnFunction()

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