Home
last modified time | relevance | path

Searched refs:Insn (Results 1 – 25 of 109) sorted by relevance

12345

/openbsd-src/gnu/llvm/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp45 uint64_t &Size, uint16_t &Insn) { in readInstruction16() argument
52 Insn = (Bytes[0] << 0) | (Bytes[1] << 8); in readInstruction16()
57 uint64_t &Size, uint32_t &Insn) { in readInstruction32() argument
64 Insn = in readInstruction32()
90 static DecodeStatus Decode2RInstruction(MCInst &Inst, unsigned Insn,
94 static DecodeStatus Decode2RImmInstruction(MCInst &Inst, unsigned Insn,
98 static DecodeStatus DecodeR2RInstruction(MCInst &Inst, unsigned Insn,
102 static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn,
106 static DecodeStatus DecodeRUSInstruction(MCInst &Inst, unsigned Insn,
110 static DecodeStatus DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn,
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp89 static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn, uint64_t Address,
92 static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn, uint64_t Address,
95 static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn, uint64_t Address,
98 static DecodeStatus decodeCallTarget(MCInst &Inst, unsigned Insn,
102 static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn, uint64_t Address,
105 static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn, uint64_t Address,
108 static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn,
112 static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn,
116 static DecodeStatus decodeFWRdK(MCInst &Inst, unsigned Insn, uint64_t Address,
119 static DecodeStatus decodeFMUL2RdRr(MCInst &Inst, unsigned Insn,
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp51 uint64_t &Size, uint32_t &Insn) { in readInstruction32() argument
54 Insn = in readInstruction32()
60 uint64_t &Size, uint64_t &Insn) { in readInstruction64() argument
62 Insn = ((uint64_t)Bytes[0] << 16) | ((uint64_t)Bytes[1] << 24) | in readInstruction64()
70 uint64_t &Size, uint64_t &Insn) { in readInstruction48() argument
72 Insn = ((uint64_t)Bytes[0] << 0) | ((uint64_t)Bytes[1] << 8) | in readInstruction48()
79 uint64_t &Size, uint32_t &Insn) { in readInstruction16() argument
81 Insn = (Bytes[0] << 0) | (Bytes[1] << 8); in readInstruction16()
156 static unsigned decodeCField(unsigned Insn) { in decodeCField() argument
157 return fieldFromInstruction(Insn, 6, 6); in decodeCField()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp278 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
281 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
285 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
287 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
290 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
293 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn,
296 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
299 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
304 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn,
307 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp50 static DecodeStatus decodeRiMemoryValue(MCInst &Inst, unsigned Insn,
54 static DecodeStatus decodeRrMemoryValue(MCInst &Inst, unsigned Insn,
58 static DecodeStatus decodeSplsValue(MCInst &Inst, unsigned Insn,
62 static DecodeStatus decodeBranch(MCInst &Inst, unsigned Insn, uint64_t Address,
69 static DecodeStatus decodeShiftImm(MCInst &Inst, unsigned Insn,
76 uint32_t &Insn) { in readInstruction32() argument
84 Insn = in readInstruction32()
90 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust() argument
101 AluOp = (Insn >> 8) & 0x7; in PostOperandDecodeAdjust()
105 AluOp |= 0x20 | (((Insn >> 3) & 0xf) << 1); in PostOperandDecodeAdjust()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp106 static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, unsigned Insn,
134 static DecodeStatus DecodeHWRegsRegisterClass(MCInst &Inst, unsigned Insn,
190 static DecodeStatus DecodeJumpTarget(MCInst &Inst, unsigned Insn,
232 static DecodeStatus DecodeJumpTargetMM(MCInst &Inst, unsigned Insn,
238 static DecodeStatus DecodeJumpTargetXMM(MCInst &Inst, unsigned Insn,
242 static DecodeStatus DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address,
245 static DecodeStatus DecodeMemEVA(MCInst &Inst, unsigned Insn, uint64_t Address,
248 static DecodeStatus DecodeLoadByte15(MCInst &Inst, unsigned Insn,
252 static DecodeStatus DecodeCacheOp(MCInst &Inst, unsigned Insn, uint64_t Address,
255 static DecodeStatus DecodeCacheeOp_CacheOpR6(MCInst &Inst, unsigned Insn,
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ExpandImm.cpp44 SmallVectorImpl<ImmInsnModel> &Insn) { in tryToreplicateChunks() argument
67 Insn.push_back({ AArch64::ORRXri, 0, Encoding }); in tryToreplicateChunks()
80 Insn.push_back({ AArch64::MOVKXi, Imm16, in tryToreplicateChunks()
95 Insn.push_back({ AArch64::MOVKXi, Imm16, in tryToreplicateChunks()
151 SmallVectorImpl<ImmInsnModel> &Insn) { in trySequenceOfOnes() argument
223 Insn.push_back({ AArch64::ORRXri, 0, Encoding }); in trySequenceOfOnes()
226 Insn.push_back({ AArch64::MOVKXi, getChunk(UImm, FirstMovkIdx), in trySequenceOfOnes()
235 Insn.push_back({ AArch64::MOVKXi, getChunk(UImm, SecondMovkIdx), in trySequenceOfOnes()
246 SmallVectorImpl<ImmInsnModel> &Insn) { in expandMOVImmSimple() argument
278 Insn.push_back({ FirstOpc, Imm16, in expandMOVImmSimple()
[all …]
H A DAArch64MIPeepholeOpt.cpp129 SmallVector<AArch64_IMM::ImmInsnModel, 4> Insn; in splitBitmaskImm() local
130 AArch64_IMM::expandMOVImm(UImm, RegSize, Insn); in splitBitmaskImm()
131 if (Insn.size() == 1) in splitBitmaskImm()
310 SmallVector<AArch64_IMM::ImmInsnModel, 4> Insn; in splitAddSubImm() local
311 AArch64_IMM::expandMOVImm(Imm, RegSize, Insn); in splitAddSubImm()
312 if (Insn.size() == 1) in splitAddSubImm()
H A DAArch64ExpandImm.h29 SmallVectorImpl<ImmInsnModel> &Insn);
/openbsd-src/gnu/llvm/llvm/lib/Analysis/
H A DInstructionPrecedenceTracking.cpp63 const Instruction *Insn) { in isPreceededBySpecialInstruction() argument
65 getFirstSpecialInstruction(Insn->getParent()); in isPreceededBySpecialInstruction()
66 return MaybeFirstSpecial && MaybeFirstSpecial->comesBefore(Insn); in isPreceededBySpecialInstruction()
90 for (const Instruction &Insn : *BB) in validate()
91 if (isSpecialInstruction(&Insn)) { in validate()
92 assert(It->second == &Insn && in validate()
138 const Instruction *Insn) const { in isSpecialInstruction()
144 return !isGuaranteedToTransferExecutionToSuccessor(Insn); in isSpecialInstruction()
148 const Instruction *Insn) const { in isSpecialInstruction()
150 if (match(Insn, m_Intrinsic<Intrinsic::experimental_widenable_condition>())) in isSpecialInstruction()
[all …]
H A DGuardUtils.cpp35 for (auto &Insn : *DeoptBB) { in isGuardAsWidenableBranch()
36 if (match(&Insn, m_Intrinsic<Intrinsic::experimental_deoptimize>())) in isGuardAsWidenableBranch()
38 if (Insn.mayHaveSideEffects()) in isGuardAsWidenableBranch()
/openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/Disassembler/
H A DMSP430Disassembler.cpp181 static AddrMode DecodeSrcAddrModeI(unsigned Insn) { in DecodeSrcAddrModeI() argument
182 unsigned Rs = fieldFromInstruction(Insn, 8, 4); in DecodeSrcAddrModeI()
183 unsigned As = fieldFromInstruction(Insn, 4, 2); in DecodeSrcAddrModeI()
187 static AddrMode DecodeSrcAddrModeII(unsigned Insn) { in DecodeSrcAddrModeII() argument
188 unsigned Rs = fieldFromInstruction(Insn, 0, 4); in DecodeSrcAddrModeII()
189 unsigned As = fieldFromInstruction(Insn, 4, 2); in DecodeSrcAddrModeII()
193 static AddrMode DecodeDstAddrMode(unsigned Insn) { in DecodeDstAddrMode() argument
194 unsigned Rd = fieldFromInstruction(Insn, 0, 4); in DecodeDstAddrMode()
195 unsigned Ad = fieldFromInstruction(Insn, 7, 1); in DecodeDstAddrMode()
233 uint64_t Insn = support::endian::read16le(Bytes.data()); in getInstructionI() local
[all …]
/openbsd-src/gnu/llvm/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp55 CodeGenInstruction &Insn,
73 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, in addDagOperandMapping() argument
93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) { in addDagOperandMapping()
97 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); in addDagOperandMapping()
104 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I) in addDagOperandMapping()
106 OpsAdded += Insn.Operands[i].MINumOperands; in addDagOperandMapping()
121 addDagOperandMapping(Rec, SubDag, Insn, OperandMap, BaseIdx + i); in addDagOperandMapping()
156 CodeGenInstruction Insn(Operator); in evaluateExpansion() local
158 if (Insn.isCodeGenOnly || Insn.isPseudo) { in evaluateExpansion()
166 if (Insn.Operands.size() != Dag->getNumArgs()) { in evaluateExpansion()
[all …]
H A DDecoderEmitter.cpp432 void insnWithID(insn_t &Insn, unsigned Opcode) const { in insnWithID() argument
434 Insn.resize(BitWidth > Bits.getNumBits() ? BitWidth : Bits.getNumBits(), in insnWithID()
446 Insn[i] = BIT_UNSET; in insnWithID()
448 Insn[i] = bitFromBits(Bits, i); in insnWithID()
466 bool fieldFromInsn(uint64_t &Field, insn_t &Insn, unsigned StartBit,
494 const insn_t &Insn) const;
577 insn_t Insn; in Filter() local
580 Owner->insnWithID(Insn, Owner->Opcodes[i].EncodingID); in Filter()
584 bool ok = Owner->fieldFromInsn(Field, Insn, StartBit, NumBits); in Filter()
1022 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn, in fieldFromInsn() argument
[all …]
/openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/
H A DInstructionPrecedenceTracking.h62 bool isPreceededBySpecialInstruction(const Instruction *Insn);
69 virtual bool isSpecialInstruction(const Instruction *Insn) const = 0;
114 bool isDominatedByICFIFromSameBlock(const Instruction *Insn) { in isDominatedByICFIFromSameBlock() argument
115 return isPreceededBySpecialInstruction(Insn); in isDominatedByICFIFromSameBlock()
118 bool isSpecialInstruction(const Instruction *Insn) const override;
137 bool isDominatedByMemoryWriteFromSameBlock(const Instruction *Insn) { in isDominatedByMemoryWriteFromSameBlock() argument
138 return isPreceededBySpecialInstruction(Insn); in isDominatedByMemoryWriteFromSameBlock()
141 bool isSpecialInstruction(const Instruction *Insn) const override;
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp352 static DecodeStatus decodeRVCInstrSImm(MCInst &Inst, unsigned Insn,
356 static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, unsigned Insn,
360 static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, unsigned Insn,
364 static DecodeStatus decodeRVCInstrRdRs2(MCInst &Inst, unsigned Insn,
368 static DecodeStatus decodeRVCInstrRdRs1Rs2(MCInst &Inst, unsigned Insn,
374 static DecodeStatus decodeRVCInstrSImm(MCInst &Inst, unsigned Insn, in decodeRVCInstrSImm() argument
378 fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrSImm()
385 static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, unsigned Insn, in decodeRVCInstrRdSImm() argument
390 fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdSImm()
397 static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, unsigned Insn, in decodeRVCInstrRdRs1UImm() argument
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp127 static DecodeStatus decodeMemoryOpValue(MCInst &Inst, unsigned Insn, in decodeMemoryOpValue() argument
130 unsigned Register = (Insn >> 16) & 0xf; in decodeMemoryOpValue()
135 unsigned Offset = (Insn & 0xffff); in decodeMemoryOpValue()
143 uint64_t &Size, uint64_t &Insn, in readInstruction64() argument
161 Insn = Make_64(Hi, Lo); in readInstruction64()
171 uint64_t Insn, Hi; in getInstruction() local
174 Result = readInstruction64(Bytes, Address, Size, Insn, IsLittleEndian); in getInstruction()
177 uint8_t InstClass = getInstClass(Insn); in getInstruction()
178 uint8_t InstMode = getInstMode(Insn); in getInstruction()
180 getInstSize(Insn) != BPF_DW && in getInstruction()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldELFMips.cpp215 uint32_t Insn = readBytesUnaligned(TargetPtr, 4); in applyMIPSRelocation() local
233 Insn = (Insn & 0xffff0000) | (Value & 0x0000ffff); in applyMIPSRelocation()
234 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
237 Insn = (Insn & 0xfffc0000) | (Value & 0x0003ffff); in applyMIPSRelocation()
238 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
241 Insn = (Insn & 0xfff80000) | (Value & 0x0007ffff); in applyMIPSRelocation()
242 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
245 Insn = (Insn & 0xffe00000) | (Value & 0x001fffff); in applyMIPSRelocation()
246 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
250 Insn = (Insn & 0xfc000000) | (Value & 0x03ffffff); in applyMIPSRelocation()
[all …]
H A DRuntimeDyldMachOARM.h271 uint32_t Insn = readBytesUnaligned(LocalAddress, 4); in resolveRelocation() local
274 Insn = (Insn & 0x8f00fbf0) | ((Value & 0xf000) >> 12) | in resolveRelocation()
278 Insn = (Insn & 0xfff0f000) | ((Value & 0xf000) << 4) | (Value & 0x0fff); in resolveRelocation()
279 writeBytesUnaligned(Insn, LocalAddress, 4); in resolveRelocation()
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp91 static DecodeStatus DecodeCCRCRegisterClass(MCInst &Inst, APInt &Insn, in DecodeCCRCRegisterClass() argument
121 auto MakeUp = [&](APInt &Insn, unsigned InstrBits) { in getInstruction() argument
122 unsigned Idx = Insn.getBitWidth() >> 3; in getInstruction()
124 if (RoundUp > Insn.getBitWidth()) in getInstruction()
125 Insn = Insn.zext(RoundUp); in getInstruction()
128 Insn.insertBits(support::endian::read16be(&Bytes[Idx]), Idx * 8, 16); in getInstruction()
131 APInt Insn(16, support::endian::read16be(Bytes.data())); in getInstruction() local
136 Result = decodeInstruction(DecoderTable80, Instr, Insn, Address, this, STI, in getInstruction()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1740 InternalInstruction Insn; in getInstruction() local
1741 memset(&Insn, 0, sizeof(InternalInstruction)); in getInstruction()
1742 Insn.bytes = Bytes; in getInstruction()
1743 Insn.startLocation = Address; in getInstruction()
1744 Insn.readerCursor = Address; in getInstruction()
1745 Insn.mode = fMode; in getInstruction()
1747 if (Bytes.empty() || readPrefixes(&Insn) || readOpcode(&Insn) || in getInstruction()
1748 getInstructionID(&Insn, MII.get()) || Insn.instructionID == 0 || in getInstruction()
1749 readOperands(&Insn)) { in getInstruction()
1750 Size = Insn.readerCursor - Address; in getInstruction()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/Disassembler/
H A DLoongArchDisassembler.cpp129 uint32_t Insn; in getInstruction() local
139 Insn = support::endian::read32le(Bytes.data()); in getInstruction()
141 Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); in getInstruction()
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp275 uint64_t &Size, uint32_t &Insn, in readInstruction32() argument
283 Insn = IsLittleEndian in readInstruction32()
296 uint32_t Insn; in getInstruction() local
299 readInstruction32(Bytes, Address, Size, Insn, isLittleEndian); in getInstruction()
307 Result = decodeInstruction(DecoderTableSparcV932, Instr, Insn, Address, this, STI); in getInstruction()
311 Result = decodeInstruction(DecoderTableSparcV832, Instr, Insn, Address, this, STI); in getInstruction()
317 decodeInstruction(DecoderTableSparc32, Instr, Insn, Address, this, STI); in getInstruction()
/openbsd-src/gnu/llvm/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp248 uint64_t &Size, uint32_t &Insn, in readInstruction24() argument
259 Insn = (Bytes[2] << 16) | (Bytes[1] << 8) | (Bytes[0] << 0); in readInstruction24()
272 uint32_t Insn; in getInstruction() local
275 Result = readInstruction24(Bytes, Address, Size, Insn, IsLittleEndian); in getInstruction()
279 Result = decodeInstruction(DecoderTable24, MI, Insn, Address, this, STI); in getInstruction()
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/Disassembler/
H A DCSKYDisassembler.cpp520 uint32_t Insn; in getInstruction() local
523 Insn = support::endian::read16le(Bytes.data()); in getInstruction()
525 if ((Insn >> 14) == 0x3) { in getInstruction()
530 Insn = (Insn << 16) | support::endian::read16le(&Bytes[2]); in getInstruction()
532 if (decodeFPUV3Instruction(MI, Insn, Address, this, STI)) in getInstruction()
536 Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); in getInstruction()
546 Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI); in getInstruction()

12345