Searched refs:In0 (Results 1 – 4 of 4) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanRecipes.cpp | 857 Value *In0 = State.get(getIncomingValue(In), Part); in execute() local
859 Entry[Part] = In0; // Initialize with the first incoming value. in execute()
865 State.Builder.CreateSelect(Cond, In0, Entry[Part], "predphi"); in execute()
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| H A D | LoopVectorizationLegality.cpp | 1061 Value *In0 = const_cast<Value *>(V); in isInductionPhi() local
1062 PHINode *PN = dyn_cast_or_null<PHINode>(In0); in isInductionPhi()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 54777 SDValue In0, In1; in matchPMADDWD_2() local
54814 if (!In0) { in matchPMADDWD_2()
54815 In0 = N00In; in matchPMADDWD_2()
54820 if (In0.getValueSizeInBits() < VT.getSizeInBits() || in matchPMADDWD_2()
54826 if (In0 != N00In) in matchPMADDWD_2()
54828 if (In0 != N10In) in matchPMADDWD_2()
54830 if (In0 != N00In || In1 != N01In || In0 != N10In || In1 != N11In) in matchPMADDWD_2()
54849 if (OutVT16.bitsLT(In0.getValueType())) { in matchPMADDWD_2()
54850 In0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, OutVT16, In0, in matchPMADDWD_2()
54857 return SplitOpsAndApply(DAG, Subtarget, DL, VT, { In0, In1 }, in matchPMADDWD_2()
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| /openbsd-src/gnu/llvm/llvm/docs/ |
| H A D | LangRef.rst | 9657 | In0 | In1 | Out |
9708 | In0 | In1 | Out |
9760 | In0 | In1 | Out |
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