Searched refs:HiRHS (Results 1 – 4 of 4) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3131 SDValue HiLHS, HiRHS; in LowerUMULO_SMULO() local
3134 HiRHS = DAG.getNode(ISD::SRA, dl, MVT::i64, RHS, ShiftAmt); in LowerUMULO_SMULO()
3137 HiRHS = DAG.getConstant(0, dl, MVT::i64); in LowerUMULO_SMULO()
3140 SDValue Args[] = { HiLHS, LHS, HiRHS, RHS }; in LowerUMULO_SMULO()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1673 SDValue LoLHS, HiLHS, LoRHS, HiRHS; in SplitVecRes_OverflowOp() local
1676 GetSplitVector(N->getOperand(1), LoRHS, HiRHS); in SplitVecRes_OverflowOp()
1679 std::tie(LoRHS, HiRHS) = DAG.SplitVectorOperand(N, 1); in SplitVecRes_OverflowOp()
1686 SDNode *HiNode = DAG.getNode(Opcode, dl, HiVTs, HiLHS, HiRHS).getNode(); in SplitVecRes_OverflowOp()
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| H A D | TargetLowering.cpp | 10039 SDValue HiRHS; in expandMULO() local
10048 HiRHS = in expandMULO()
10054 HiRHS = DAG.getConstant(0, dl, VT); in expandMULO()
10070 SDValue Args[] = { LHS, HiLHS, RHS, HiRHS }; in expandMULO()
10073 SDValue Args[] = { HiLHS, LHS, HiRHS, RHS }; in expandMULO()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3147 SDValue HiRHS = DAG.getConstant(ValHi, SL, MVT::i32); in splitBinaryBitConstantOpImpl() local
3150 SDValue HiAnd = DAG.getNode(Opc, SL, MVT::i32, Hi, HiRHS); in splitBinaryBitConstantOpImpl()
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