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Searched refs:HalfVT (Results 1 – 14 of 14) sorted by relevance

/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DValueTypes.h402 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); in getHalfSizedIntegerVT() local
403 if (HalfVT.getSizeInBits() * 2 >= EVTSize) in getHalfSizedIntegerVT()
404 return HalfVT; in getHalfSizedIntegerVT()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1808 EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext()); in LowerUDIVREM64() local
1810 SDValue One = DAG.getConstant(1, DL, HalfVT); in LowerUDIVREM64()
1811 SDValue Zero = DAG.getConstant(0, DL, HalfVT); in LowerUDIVREM64()
1815 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero); in LowerUDIVREM64()
1816 SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, One); in LowerUDIVREM64()
1819 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, Zero); in LowerUDIVREM64()
1820 SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, One); in LowerUDIVREM64()
1825 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerUDIVREM64()
1864 SDValue Rcp_Lo = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Mad2); in LowerUDIVREM64()
1865 SDValue Rcp_Hi = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Trunc); in LowerUDIVREM64()
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H A DSIISelLowering.cpp5981 EVT HalfVT = MVT::getVectorVT(VT.getVectorElementType().getSimpleVT(), in lowerBUILD_VECTOR() local
5983 MVT HalfIntVT = MVT::getIntegerVT(HalfVT.getSizeInBits()); in lowerBUILD_VECTOR()
5992 SDValue Lo = DAG.getBuildVector(HalfVT, SL, LoOps); in lowerBUILD_VECTOR()
5993 SDValue Hi = DAG.getBuildVector(HalfVT, SL, HiOps); in lowerBUILD_VECTOR()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp372 MVT HalfVT = scaleVectorType(VT); in interleave8bitStride4() local
390 createUnpackShuffleMask(HalfVT, MaskLowTemp, true, false); in interleave8bitStride4()
391 createUnpackShuffleMask(HalfVT, MaskHighTemp, false, false); in interleave8bitStride4()
H A DX86ISelLowering.cpp9483 EVT HalfVT = in EltsFromConsecutiveLoads() local
9486 EltsFromConsecutiveLoads(HalfVT, Elts.drop_back(HalfNumElems), DL, in EltsFromConsecutiveLoads()
10615 MVT HalfVT = VT.getHalfNumVectorElementsVT(); in getHopForBuildVector() local
10618 SDValue Half = DAG.getNode(HOpcode, SDLoc(BV), HalfVT, V0, V1); in getHopForBuildVector()
11624 MVT HalfVT = ResVT.getHalfNumVectorElementsVT(); in LowerAVXCONCAT_VECTORS() local
11626 SDValue Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, in LowerAVXCONCAT_VECTORS()
11628 SDValue Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, in LowerAVXCONCAT_VECTORS()
11714 MVT HalfVT = ResVT.getHalfNumVectorElementsVT(); in LowerCONCAT_VECTORSvXi1() local
11716 SDValue Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, in LowerCONCAT_VECTORSvXi1()
11718 SDValue Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, in LowerCONCAT_VECTORSvXi1()
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.cpp1048 EVT HalfVT = in SplitInteger() local
1050 SplitInteger(Op, HalfVT, HalfVT, Lo, Hi); in SplitInteger()
H A DLegalizeIntegerTypes.cpp4492 EVT HalfVT = LHSLow.getValueType(); in ExpandIntRes_XMULO() local
4494 SDVTList VTHalfWithO = DAG.getVTList(HalfVT, BitVT); in ExpandIntRes_XMULO()
4496 SDValue HalfZero = DAG.getConstant(0, dl, HalfVT); in ExpandIntRes_XMULO()
4507 SDValue HighSum = DAG.getNode(ISD::ADD, dl, HalfVT, One, Two); in ExpandIntRes_XMULO()
4758 EVT HalfVT = In1.getValueType(); in ExpandIntRes_FunnelShift() local
4767 unsigned HalfVTBits = HalfVT.getScalarSizeInBits(); in ExpandIntRes_FunnelShift()
4775 EVT NewShAmtVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout()); in ExpandIntRes_FunnelShift()
4778 SDValue Select1 = DAG.getNode(ISD::SELECT, DL, HalfVT, Cond, In1, In2); in ExpandIntRes_FunnelShift()
4779 SDValue Select2 = DAG.getNode(ISD::SELECT, DL, HalfVT, Cond, In2, In3); in ExpandIntRes_FunnelShift()
4780 SDValue Select3 = DAG.getNode(ISD::SELECT, DL, HalfVT, Cond, In3, In4); in ExpandIntRes_FunnelShift()
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H A DDAGCombiner.cpp5695 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), Size / 2); in visitANDLike() local
5701 TLI.isNarrowingProfitable(VT, HalfVT) && in visitANDLike()
5702 TLI.isTypeDesirableForOp(ISD::AND, HalfVT) && in visitANDLike()
5703 TLI.isTypeDesirableForOp(ISD::SRL, HalfVT) && in visitANDLike()
5704 TLI.isTruncateFree(VT, HalfVT) && in visitANDLike()
5705 TLI.isZExtFree(HalfVT, VT)) { in visitANDLike()
5715 EVT ShiftVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout()); in visitANDLike()
5716 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, HalfVT, in visitANDLike()
5719 SDValue NewMask = DAG.getConstant(AndMask.trunc(Size / 2), SL, HalfVT); in visitANDLike()
5721 SDValue Shift = DAG.getNode(ISD::SRL, SL, HalfVT, Trunc, ShiftK); in visitANDLike()
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H A DLegalizeVectorTypes.cpp3690 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, in SplitVecOp_TruncateHelper() local
3697 HalfLo = DAG.getNode(N->getOpcode(), DL, {HalfVT, MVT::Other}, in SplitVecOp_TruncateHelper()
3699 HalfHi = DAG.getNode(N->getOpcode(), DL, {HalfVT, MVT::Other}, in SplitVecOp_TruncateHelper()
3706 HalfLo = DAG.getNode(N->getOpcode(), DL, HalfVT, InLoVec); in SplitVecOp_TruncateHelper()
3707 HalfHi = DAG.getNode(N->getOpcode(), DL, HalfVT, InHiVec); in SplitVecOp_TruncateHelper()
H A DTargetLowering.cpp2216 EVT HalfVT = Op.getOperand(0).getValueType(); in SimplifyDemandedBits() local
2217 unsigned HalfBitWidth = HalfVT.getScalarSizeInBits(); in SimplifyDemandedBits()
10123 EVT HalfVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in expandVecReduce() local
10124 if (!isOperationLegalOrCustom(BaseOpcode, HalfVT)) in expandVecReduce()
10129 Op = DAG.getNode(BaseOpcode, dl, HalfVT, Lo, Hi); in expandVecReduce()
10130 VT = HalfVT; in expandVecReduce()
H A DSelectionDAGBuilder.cpp191 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2); in getCopyFromParts() local
195 PartVT, HalfVT, V); in getCopyFromParts()
197 RoundParts / 2, PartVT, HalfVT, V); in getCopyFromParts()
199 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
200 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4565 EVT HalfVT; in selectUmullSmull() local
4568 HalfVT = MVT::v2i32; in selectUmullSmull()
4571 HalfVT = MVT::v4i16; in selectUmullSmull()
4574 HalfVT = MVT::v8i8; in selectUmullSmull()
4580 SDValue NewExt = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, in selectUmullSmull()
12715 EVT HalfVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in LowerINSERT_SUBVECTOR() local
12718 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, Vec0, in LowerINSERT_SUBVECTOR()
12720 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, Vec0, in LowerINSERT_SUBVECTOR()
12723 SDValue NewLo = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, HalfVT, Lo, Vec1, in LowerINSERT_SUBVECTOR()
12728 DAG.getNode(ISD::INSERT_SUBVECTOR, DL, HalfVT, Hi, Vec1, in LowerINSERT_SUBVECTOR()
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp17781 MVT ExtVT, HalfVT; in PerformMinMaxCombine() local
17783 HalfVT = MVT::v8i16; in PerformMinMaxCombine()
17786 HalfVT = MVT::v16i8; in PerformMinMaxCombine()
17794 DAG.getNode(ARMISD::VQMOVNs, DL, HalfVT, DAG.getUNDEF(HalfVT), in PerformMinMaxCombine()
17821 MVT HalfVT; in PerformMinMaxCombine() local
17824 HalfVT = MVT::v8i16; in PerformMinMaxCombine()
17827 HalfVT = MVT::v16i8; in PerformMinMaxCombine()
17835 DAG.getNode(ARMISD::VQMOVNu, DL, HalfVT, DAG.getUNDEF(HalfVT), N0, in PerformMinMaxCombine()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp3320 MVT HalfVT = VT.getHalfNumVectorElementsVT(); in lowerVECTOR_SHUFFLE() local
3321 V1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, V1, in lowerVECTOR_SHUFFLE()
3323 V2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, V2, in lowerVECTOR_SHUFFLE()