| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRAsmBackend.cpp | 38 std::string Description, const MCFixup &Fixup, in signed_width() argument
50 Ctx->reportError(Fixup.getLoc(), Diagnostic); in signed_width()
58 std::string Description, const MCFixup &Fixup, in unsigned_width() argument
69 Ctx->reportError(Fixup.getLoc(), Diagnostic); in unsigned_width()
77 static void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in adjustBranch() argument
81 unsigned_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx); in adjustBranch()
88 static void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, in adjustRelativeBranch() argument
92 signed_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx); in adjustRelativeBranch()
104 static void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in fixup_call() argument
106 adjustBranch(Size, Fixup, Value, Ctx); in fixup_call()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64ELFObjectWriter.cpp | 41 const MCFixup &Fixup, bool IsPCRel) const override;
59 static bool isNonILP32reloc(const MCFixup &Fixup, in isNonILP32reloc() argument
62 if (Fixup.getTargetKind() != AArch64::fixup_aarch64_movw) in isNonILP32reloc()
66 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G3)); in isNonILP32reloc()
69 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2)); in isNonILP32reloc()
72 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G2)); in isNonILP32reloc()
75 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2_NC)); in isNonILP32reloc()
78 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G1)); in isNonILP32reloc()
81 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G1_NC)); in isNonILP32reloc()
84 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G2)); in isNonILP32reloc()
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| H A D | AArch64AsmBackend.cpp | 85 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
90 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
100 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
150 static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, in adjustFixupValue() argument
154 switch (Fixup.getTargetKind()) { in adjustFixupValue()
159 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
165 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
173 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
175 Ctx.reportError(Fixup.getLoc(), "fixup not sufficiently aligned"); in adjustFixupValue()
184 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
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| H A D | AArch64MachObjectWriter.cpp | 35 bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType,
45 const MCFixup &Fixup, MCValue Target,
52 const MCFixup &Fixup, unsigned &RelocType, const MCSymbolRefExpr *Sym, in getAArch64FixupKindMachOInfo() argument
57 switch (Fixup.getTargetKind()) { in getAArch64FixupKindMachOInfo()
102 Asm.getContext().reportError(Fixup.getLoc(), in getAArch64FixupKindMachOInfo()
153 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
155 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in recordRelocation()
163 unsigned Kind = Fixup.getKind(); in recordRelocation()
166 FixupOffset += Fixup.getOffset(); in recordRelocation()
182 Asm.getContext().reportError(Fixup.getLoc(), in recordRelocation()
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| H A D | AArch64WinCOFFObjectWriter.cpp | 41 const MCFixup &Fixup, bool IsCrossSection,
50 MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, in getRelocType() argument
52 unsigned FixupKind = Fixup.getKind(); in getRelocType()
59 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression"); in getRelocType()
67 const MCExpr *Expr = Fixup.getValue(); in getRelocType()
77 Ctx.reportError(Fixup.getLoc(), "relocation variant " + in getRelocType()
87 Ctx.reportError(Fixup.getLoc(), "relocation type " + in getRelocType()
91 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); in getRelocType()
92 Ctx.reportError(Fixup.getLoc(), Twine("relocation type ") + Info.Name + in getRelocType()
160 bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { in recordRelocation()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFAsmBackend.cpp | 29 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
38 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
63 void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
68 if (Fixup.getKind() == FK_SecRel_8) { in applyFixup()
72 support::endian::write<uint32_t>(&Data[Fixup.getOffset() + 4], in applyFixup()
75 } else if (Fixup.getKind() == FK_Data_4) { in applyFixup()
76 support::endian::write<uint32_t>(&Data[Fixup.getOffset()], Value, Endian); in applyFixup()
77 } else if (Fixup.getKind() == FK_Data_8) { in applyFixup()
78 support::endian::write<uint64_t>(&Data[Fixup.getOffset()], Value, Endian); in applyFixup()
79 } else if (Fixup.getKind() == FK_PCRel_4) { in applyFixup()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MachObjectWriter.cpp | 31 const MCFixup &Fixup,
39 const MCFixup &Fixup,
47 const MCFixup &Fixup,
52 const MCFragment *Fragment, const MCFixup &Fixup,
61 const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
64 RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
67 RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
104 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in RecordX86_64Relocation() argument
106 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordX86_64Relocation()
107 unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind()); in RecordX86_64Relocation()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Xtensa/MCTargetDesc/ |
| H A D | XtensaAsmBackend.cpp | 39 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
45 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
81 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
83 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
95 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
103 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
108 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
113 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
118 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
120 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned"); in adjustFixupValue()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/MCTargetDesc/ |
| H A D | VEELFObjectWriter.cpp | 32 const MCFixup &Fixup, bool IsPCRel) const override;
40 const MCFixup &Fixup, in getRelocType() argument
42 if (const VEMCExpr *SExpr = dyn_cast<VEMCExpr>(Fixup.getValue())) { in getRelocType()
48 switch (Fixup.getTargetKind()) { in getRelocType()
50 Ctx.reportError(Fixup.getLoc(), "Unsupported pc-relative fixup kind"); in getRelocType()
54 Ctx.reportError(Fixup.getLoc(), in getRelocType()
59 Ctx.reportError(Fixup.getLoc(), in getRelocType()
67 Ctx.reportError(Fixup.getLoc(), in getRelocType()
80 switch (Fixup.getTargetKind()) { in getRelocType()
82 Ctx.reportError(Fixup.getLoc(), "Unknown ELF relocation type"); in getRelocType()
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| H A D | VEAsmBackend.cpp | 133 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, in shouldForceRelocation() argument
135 switch ((VE::Fixups)Fixup.getKind()) { in shouldForceRelocation()
156 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
190 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
194 Value = adjustFixupValue(Fixup.getKind(), Value); in applyFixup()
198 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); in applyFixup()
203 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); in applyFixup()
204 unsigned Offset = Fixup.getOffset(); in applyFixup()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYAsmBackend.cpp | 86 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
88 switch (Fixup.getTargetKind()) { in adjustFixupValue()
107 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue()
109 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue()
114 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue()
116 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned."); in adjustFixupValue()
121 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue()
123 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue()
128 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue()
130 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue()
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| H A D | CSKYELFObjectWriter.cpp | 29 const MCFixup &Fixup, bool IsPCRel) const override;
36 const MCFixup &Fixup, in getRelocType() argument
38 const MCExpr *Expr = Fixup.getValue(); in getRelocType()
40 unsigned Kind = Fixup.getTargetKind(); in getRelocType()
47 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type"); in getRelocType()
72 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type"); in getRelocType()
75 Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported"); in getRelocType()
78 Ctx.reportError(Fixup.getLoc(), "2-byte data relocations not supported"); in getRelocType()
107 Ctx.reportError(Fixup.getLoc(), "unknown target FK_Data_4"); in getRelocType()
111 Ctx.reportError(Fixup.getLoc(), in getRelocType()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchAsmBackend.cpp | 86 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
88 switch (Fixup.getTargetKind()) { in adjustFixupValue()
98 reportOutOfRangeError(Ctx, Fixup.getLoc(), 18); in adjustFixupValue()
100 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned"); in adjustFixupValue()
105 reportOutOfRangeError(Ctx, Fixup.getLoc(), 23); in adjustFixupValue()
107 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned"); in adjustFixupValue()
112 reportOutOfRangeError(Ctx, Fixup.getLoc(), 28); in adjustFixupValue()
114 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned"); in adjustFixupValue()
133 const MCFixup &Fixup, in applyFixup() argument
141 MCFixupKind Kind = Fixup.getKind(); in applyFixup()
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| H A D | LoongArchELFObjectWriter.cpp | 29 const MCFixup &Fixup, bool IsPCRel) const override;
41 const MCFixup &Fixup, in getRelocType() argument
44 unsigned Kind = Fixup.getTargetKind(); in getRelocType()
51 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type"); in getRelocType()
54 Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported"); in getRelocType()
57 Ctx.reportError(Fixup.getLoc(), "2-byte data relocations not supported"); in getRelocType()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMELFObjectWriter.cpp | 30 unsigned GetRelocTypeInner(const MCValue &Target, const MCFixup &Fixup,
39 const MCFixup &Fixup, bool IsPCRel) const override;
73 const MCFixup &Fixup, in getRelocType() argument
75 return GetRelocTypeInner(Target, Fixup, IsPCRel, Ctx); in getRelocType()
79 const MCFixup &Fixup, in GetRelocTypeInner() argument
82 unsigned Kind = Fixup.getTargetKind(); in GetRelocTypeInner()
88 switch (Fixup.getTargetKind()) { in GetRelocTypeInner()
90 Ctx.reportError(Fixup.getLoc(), "unsupported relocation on symbol"); in GetRelocTypeInner()
95 Ctx.reportError(Fixup.getLoc(), in GetRelocTypeInner()
162 Ctx.reportError(Fixup.getLoc(), "unsupported relocation on symbol"); in GetRelocTypeInner()
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| H A D | ARMMachObjectWriter.cpp | 34 const MCFixup &Fixup,
43 const MCFixup &Fixup, MCValue Target,
57 const MCFixup &Fixup, MCValue Target,
144 const MCFixup &Fixup, in RecordARMScatteredHalfRelocation() argument
147 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset(); in RecordARMScatteredHalfRelocation()
150 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
157 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordARMScatteredHalfRelocation()
164 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
179 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
207 switch (Fixup.getTargetKind()) { in RecordARMScatteredHalfRelocation()
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| H A D | ARMWinCOFFObjectWriter.cpp | 37 const MCFixup &Fixup, bool IsCrossSection,
47 const MCFixup &Fixup, in getRelocType() argument
53 unsigned FixupKind = Fixup.getKind(); in getRelocType()
56 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression"); in getRelocType()
65 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); in getRelocType()
96 bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { in recordRelocation()
97 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16; in recordRelocation()
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| H A D | ARMAsmBackend.cpp | 246 const char *ARMAsmBackend::reasonForFixupRelaxation(const MCFixup &Fixup, in reasonForFixupRelaxation() argument
248 switch (Fixup.getTargetKind()) { in reasonForFixupRelaxation()
325 bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
328 return reasonForFixupRelaxation(Fixup, Value); in fixupNeedsRelaxation()
430 const MCFixup &Fixup, in adjustFixupValue() argument
434 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
452 Ctx.reportError(Fixup.getLoc(), "bad relocation fixup type"); in adjustFixupValue()
507 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue()
528 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue()
559 dyn_cast<MCSymbolRefExpr>(Fixup.getValue())) in adjustFixupValue()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430AsmBackend.cpp | 32 uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
40 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
50 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
56 bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved, in fixupNeedsRelaxationAdvanced() argument
97 uint64_t MSP430AsmBackend::adjustFixupValue(const MCFixup &Fixup, in adjustFixupValue() argument
100 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
104 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned"); in adjustFixupValue()
114 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
126 void MSP430AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
131 Value = adjustFixupValue(Fixup, Value, Asm.getContext()); in applyFixup()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.cpp | 117 const MCFixup &Fixup, in shouldForceRelocation() argument
119 if (Fixup.getKind() >= FirstLiteralRelocationKind) in shouldForceRelocation()
121 switch (Fixup.getTargetKind()) { in shouldForceRelocation()
140 bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, in fixupNeedsRelaxationAdvanced() argument
154 switch (Fixup.getTargetKind()) { in fixupNeedsRelaxationAdvanced()
213 std::pair<unsigned, unsigned> Fixup; in relaxDwarfLineAddr() local
226 Fixup = PtrSize == 4 ? std::make_pair(RISCV::fixup_riscv_add_32, in relaxDwarfLineAddr()
234 Fixup = {RISCV::fixup_riscv_add_16, RISCV::fixup_riscv_sub_16}; in relaxDwarfLineAddr()
240 Offset, MBE.getLHS(), static_cast<MCFixupKind>(std::get<0>(Fixup)))); in relaxDwarfLineAddr()
242 Offset, MBE.getRHS(), static_cast<MCFixupKind>(std::get<1>(Fixup)))); in relaxDwarfLineAddr()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUAsmBackend.cpp | 35 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
39 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
55 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
70 bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, in fixupNeedsRelaxation() argument
113 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
117 switch (Fixup.getTargetKind()) { in adjustFixupValue()
122 Ctx->reportError(Fixup.getLoc(), "branch size exceeds simm16"); in adjustFixupValue()
138 void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
143 if (Fixup.getKind() >= FirstLiteralRelocationKind) in applyFixup()
146 Value = adjustFixupValue(Fixup, Value, &Asm.getContext()); in applyFixup()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCAsmBackend.cpp | 27 const MCFixup &Fixup, MCContext &Ctx) { in extractBitsForFixup() argument
34 Ctx.reportError(Fixup.getLoc(), "operand out of range (" + Twine(SVal) + in extractBitsForFixup()
44 Ctx.reportError(Fixup.getLoc(), "Non-even PC relative offset."); in extractBitsForFixup()
94 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
96 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
100 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
157 const MCFixup &Fixup, in shouldForceRelocation() argument
159 return Fixup.getKind() >= FirstLiteralRelocationKind; in shouldForceRelocation()
163 const MCFixup &Fixup, in applyFixup() argument
168 MCFixupKind Kind = Fixup.getKind(); in applyFixup()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsAsmBackend.cpp | 38 static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
41 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
82 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue()
92 Ctx.reportError(Fixup.getLoc(), "out of range PC19 fixup"); in adjustFixupValue()
131 Ctx.reportError(Fixup.getLoc(), "out of range PC7 fixup"); in adjustFixupValue()
141 Ctx.reportError(Fixup.getLoc(), "out of range PC10 fixup"); in adjustFixupValue()
151 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue()
160 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
167 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
173 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCExpr.cpp | 105 const MCFixup *Fixup) const { in evaluateAsRelocatableImpl()
108 if (!getSubExpr()->evaluateAsRelocatable(Value, Layout, Fixup)) in evaluateAsRelocatableImpl()
113 bool IsHalf16 = Fixup && Fixup->getTargetKind() == PPC::fixup_ppc_half16; in evaluateAsRelocatableImpl()
115 Fixup && Fixup->getTargetKind() == PPC::fixup_ppc_half16ds; in evaluateAsRelocatableImpl()
117 Fixup && Fixup->getTargetKind() == PPC::fixup_ppc_half16dq; in evaluateAsRelocatableImpl()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcELFObjectWriter.cpp | 33 const MCFixup &Fixup, bool IsPCRel) const override;
43 const MCFixup &Fixup, in getRelocType() argument
45 MCFixupKind Kind = Fixup.getKind(); in getRelocType()
49 if (const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(Fixup.getValue())) { in getRelocType()
55 switch(Fixup.getTargetKind()) { in getRelocType()
71 switch(Fixup.getTargetKind()) { in getRelocType()
76 case FK_Data_2: return ((Fixup.getOffset() % 2) in getRelocType()
79 case FK_Data_4: return ((Fixup.getOffset() % 4) in getRelocType()
82 case FK_Data_8: return ((Fixup.getOffset() % 8) in getRelocType()
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