| /openbsd-src/gnu/llvm/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 92 DAG_FUNCTION(rint, 1, 1, experimental_constrained_rint, FRINT)
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 925 FRINT, enumerator
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| H A D | BasicTTIImpl.h | 1825 ISD = ISD::FRINT; in getTypeBasedIntrinsicInstrCost()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedNeoverseN2.td | 801 def : InstRW<[N2Write_3cyc_1V0], (instregex "^FRINT[AIMNPXZ][HSD]r$",
802 "^FRINT(32|64)[XZ][SD]r$")>;
1100 (instregex "^FRINT[AIMNPXZ]v2f(32|64)$",
1101 "^FRINT[32|64)[XZ]v2f(32|64)$")>;
1105 (instregex "^FRINT[AIMNPXZ]v4f(16|32)$",
1106 "^FRINT(32|64)[XZ]v4f32$")>;
1110 def : InstRW<[N2Write_6cyc_4V0], (instregex "^FRINT[AIMNPXZ]v8f16$")>;
2013 def : InstRW<[N2Write_6cyc_4V0], (instregex "^FRINT[AIMNPXZ]_ZPmZ_H$")>;
2016 def : InstRW<[N2Write_4cyc_2V0], (instregex "^FRINT[AIMNPXZ]_ZPmZ_S$")>;
2019 def : InstRW<[N2Write_3cyc_1V0], (instregex "^FRINT[AIMNPXZ]_ZPmZ_D$")>;
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| H A D | AArch64SchedA57.td | 512 def : InstRW<[A57Write_5cyc_1V], (instregex "^FRINT[AIMNPXZ](v2f32)")>;
514 def : InstRW<[A57Write_5cyc_2V], (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
586 def : InstRW<[A57Write_5cyc_1V], (instregex "^FRINT.+r")>;
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| H A D | AArch64SchedAmpere1.td | 888 def : InstRW<[Ampere1Write_4cyc_1XY], (instregex "^FRINT[AIMNPXZ]v.[if]16")>;
917 def : InstRW<[Ampere1Write_6cyc_1XY], (instregex "^FRINT[AIMNPXZ]v.[if](32|64)")>;
918 def : InstRW<[Ampere1Write_6cyc_1XY], (instregex "^FRINT(32|64)")>;
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| H A D | AArch64SchedFalkorDetails.td | 592 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)v2f32$")>;
617 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)(v2f64|v4f32)$")>;
1123 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)(S|D)r$")>;
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| H A D | AArch64SchedExynosM3.td | 546 def : InstRW<[M3WriteFCVT3A], (instregex "^FRINT.+r")>;
661 def : InstRW<[M3WriteFCVT3A], (instregex "^FRINT[AIMNPXZ]v")>;
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| H A D | AArch64SchedTSV110.td | 508 def : InstRW<[TSV110Wr_3cyc_1F], (instregex "^FRINT.+r")>;
698 def : InstRW<[TSV110Wr_3cyc_1F], (instregex "^FRINT[AIMNPXZ]v")>;
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| H A D | AArch64SchedA64FX.td | 1316 (instregex "^FRINT(A|I|M|N|P|X|Z)(Sr|Dr)")>;
1561 (instregex "^FRINT[AIMNPXZ](v2f32)")>;
1564 (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
2089 "^FRINT._Z", "^FSCALE_Z", "^FTMAD_Z", "^FTSMUL_Z",
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| H A D | AArch64SchedExynosM4.td | 657 def : InstRW<[M4WriteFCVT3A], (instregex "^FRINT.+r")>;
802 def : InstRW<[M4WriteFCVT3A], (instregex "^FRINT[AIMNPXZ]v")>;
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| H A D | AArch64SchedExynosM5.td | 716 def : InstRW<[M5WriteFCVT3A], (instregex "^FRINT.+r")>;
840 def : InstRW<[M5WriteFCVT3A], (instregex "^FRINT[AIMNPXZ]v")>;
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| H A D | AArch64SchedThunderX3T110.td | 1296 (instregex "^FRINT(A|I|M|N|P|X|Z)(Sr|Dr)")>;
1522 (instregex "^FRINT[AIMNPXZ](v2f32)")>;
1525 (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
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| H A D | AArch64SchedThunderX2T99.td | 1188 (instregex "^FRINT(A|I|M|N|P|X|Z)(Sr|Dr)")>;
1414 (instregex "^FRINT[AIMNPXZ](v2f32)")>;
1417 (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
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| H A D | AArch64SchedKryoDetails.td | 963 (instregex "FRINT(A|I|M|N|P|X|Z)(S|D)r")>;
969 (instregex "FRINT(A|I|M|N|P|X|Z)v2f32")>;
975 (instregex "FRINT(A|I|M|N|P|X|Z)(v2f64|v4f32)")>;
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| H A D | AArch64SchedCyclone.td | 580 // FRINT(AIMNPXZ) V,V
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| H A D | AArch64ISelLowering.cpp | 474 setOperationAction(ISD::FRINT, MVT::f128, Expand); in AArch64TargetLowering()
668 ISD::FRINT, ISD::FROUND, ISD::FROUNDEVEN, in AArch64TargetLowering()
704 setOperationAction(ISD::FRINT, MVT::v4f16, Expand); in AArch64TargetLowering()
720 setOperationAction(ISD::FRINT, MVT::v8f16, Expand); in AArch64TargetLowering()
734 ISD::FRINT, ISD::FTRUNC, ISD::FROUND, in AArch64TargetLowering()
1026 ISD::FRINT, ISD::FROUND, ISD::FROUNDEVEN, in AArch64TargetLowering()
1172 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, in AArch64TargetLowering()
1384 setOperationAction(ISD::FRINT, VT, Custom); in AArch64TargetLowering()
1762 setOperationAction(ISD::FRINT, VT, Custom); in addTypeForStreamingSVE()
1881 setOperationAction(ISD::FRINT, VT, Custom); in addTypeForFixedLengthSVE()
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 325 ISD::FFLOOR, ISD::FRINT, ISD::FTRUNC, ISD::FMINNUM, in AMDGPUTargetLowering()
451 ISD::FMUL, ISD::FMA, ISD::FRINT, ISD::FNEARBYINT, in AMDGPUTargetLowering()
572 case ISD::FRINT: in fnegFoldsIntoOp()
1255 case ISD::FRINT: return LowerFRINT(Op, DAG); in LowerOperation()
2263 return DAG.getNode(ISD::FRINT, SDLoc(Op), Op.getValueType(), Op.getOperand(0)); in LowerFNEARBYINT()
2270 return DAG.getNode(ISD::FRINT, SDLoc(Op), VT, Arg); in LowerFROUNDEVEN()
3977 case ISD::FRINT: in performFNegCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 213 case ISD::FRINT: return "frint"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 117 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break; in SoftenFloatResult()
1258 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break; in ExpandFloatResult()
2269 case ISD::FRINT: in PromoteFloatResult()
2635 case ISD::FRINT: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 380 case ISD::FRINT: in LegalizeOp()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 145 setOperationAction(ISD::FRINT, MVT::f16, Promote); in MipsSETargetLowering()
387 setOperationAction(ISD::FRINT, Ty, Legal); in addMSAFloatType()
1909 return DAG.getNode(ISD::FRINT, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 129 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
244 ISD::FEXP, ISD::FEXP2, ISD::FRINT}) in WebAssemblyTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 104 setOperationAction(ISD::FRINT, MVT::f32, Legal); in LoongArchTargetLowering()
106 setOperationAction(ISD::FRINT, MVT::f64, Legal); in LoongArchTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 900 ISD::FRINT, ISD::FTRUNC, ISD::LROUND, ISD::LLROUND, in initActions()
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