Searched refs:FPR128 (Results 1 – 7 of 7) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.td | 2839 // Match all load 128 bits width whose type is compatible with FPR128 2992 // Match all load 128 bits width whose type is compatible with FPR128 3178 // Match all load 128 bits width whose type is compatible with FPR128 3436 def : Pat<(AArch64stnp FPR128:$Rt, FPR128:$Rt2, (am_indexed7s128 GPR64sp:$Rn, simm7s16:$offset)), 3437 (STNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, simm7s16:$offset)>; 3458 def : Pat<(store (f128 FPR128:$Rt), 3461 (STRQroW FPR128:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend128:$extend)>; 3462 def : Pat<(store (f128 FPR128:$Rt), 3465 (STRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro_Wextend128:$extend)>; 3515 // Match all store 128 bits width whose type is compatible with FPR128 [all …]
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| H A D | AArch64RegisterInfo.td | 460 def FPR128 : RegisterClass<"AArch64", 470 128, (trunc FPR128, 16)>; 491 def QSeqPairs : RegisterTuples<[qsub0, qsub1], [(rotl FPR128, 0), (rotl FPR128, 1)]>; 493 [(rotl FPR128, 0), (rotl FPR128, 1), 494 (rotl FPR128, 2)]>; 496 [(rotl FPR128, 0), (rotl FPR128, 1), 497 (rotl FPR128, 2), (rotl FPR128, 3)]>; 524 def V128 : RegisterOperand<FPR128, "printVRegOperand"> { 653 defm VecListOne : VectorList<1, FPR64, FPR128>; 685 def FPR128Op : RegisterOperand<FPR128, "printOperand"> { [all …]
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| H A D | AArch64FrameLowering.cpp | 2502 enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type; enumerator 2516 case FPR128: in getScale() 2574 RPI.Type = RegPairInfo::FPR128; in computeCalleeSaveRegisterPairs() 2600 case RegPairInfo::FPR128: in computeCalleeSaveRegisterPairs() 2665 !RPI.isScalable() && RPI.Type != RegPairInfo::FPR128 && in computeCalleeSaveRegisterPairs() 2775 case RegPairInfo::FPR128: in spillCalleeSavedRegisters() 2879 case RegPairInfo::FPR128: in restoreCalleeSavedRegisters()
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| H A D | AArch64InstrFormats.td | 11173 : SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst), 11174 (ins FPR128:$Rd, FPR32:$Rn, V128:$Rm), 11175 [(set (v4i32 FPR128:$dst), 11176 (OpNode (v4i32 FPR128:$Rd), (i32 FPR32:$Rn), 11187 : SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst), 11188 (ins FPR128:$Rd, FPR128:$Rn, V128:$Rm), 11189 [(set (v4i32 FPR128:$dst), 11190 (OpNode (v4i32 FPR128:$Rd), (v4i32 FPR128:$Rn), 11269 : CryptoRRR<op0, op1, (outs FPR128:$Vdst), (ins FPR128:$Vd, FPR128:$Vn, V128:$Vm),
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 304 const auto &FPR128 = AArch64MCRegisterClasses[AArch64::FPR128RegClassID]; in isQForm() local 306 return Op.isReg() && FPR128.contains(Op.getReg()); in isQForm() 311 const auto &FPR128 = AArch64MCRegisterClasses[AArch64::FPR128RegClassID]; in isFpOrNEON() local 321 return FPR128.contains(Reg) || FPR64.contains(Reg) || FPR32.contains(Reg) || in isFpOrNEON()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.td | 217 class FPR128<bits<16> num, string n, FPR64 low, FPR64 high> 237 def F#I#Q : FPR128<I, "f"#I, !cast<FPR64>("F"#!add(I, 2)#"D"),
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/ |
| H A D | CSKYRegisterInfo.td | 203 def FPR128 : RegisterClass<"CSKY",
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