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Searched refs:FMAXNUM (Results 1 – 25 of 32) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/include/llvm/IR/
H A DConstrainedOps.def85 DAG_FUNCTION(maxnum, 2, 0, experimental_constrained_maxnum, FMAXNUM)
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h943 FMAXNUM, enumerator
H A DBasicTTIImpl.h1801 ISD = ISD::FMAXNUM; in getTypeBasedIntrinsicInstrCost()
H A DTargetLowering.h2688 case ISD::FMAXNUM: in isCommutativeBinOp()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp3530 { ISD::FMAXNUM, MVT::f32, { 2 } }, in getIntrinsicInstrCost()
3531 { ISD::FMAXNUM, MVT::v4f32, { 2 } }, in getIntrinsicInstrCost()
3532 { ISD::FMAXNUM, MVT::v8f32, { 2 } }, in getIntrinsicInstrCost()
3533 { ISD::FMAXNUM, MVT::v16f32, { 2 } }, in getIntrinsicInstrCost()
3534 { ISD::FMAXNUM, MVT::f64, { 2 } }, in getIntrinsicInstrCost()
3535 { ISD::FMAXNUM, MVT::v2f64, { 2 } }, in getIntrinsicInstrCost()
3536 { ISD::FMAXNUM, MVT::v4f64, { 2 } }, in getIntrinsicInstrCost()
3537 { ISD::FMAXNUM, MVT::v8f64, { 2 } }, in getIntrinsicInstrCost()
3652 { ISD::FMAXNUM, MVT::v8f32, { 3 } }, // MAXPS + CMPUNORDPS + BLENDVPS in getIntrinsicInstrCost()
3653 { ISD::FMAXNUM, MVT::v4f64, { 3 } }, // MAXPD + CMPUNORDPD + BLENDVPD in getIntrinsicInstrCost()
[all …]
/openbsd-src/gnu/llvm/llvm/docs/GlobalISel/
H A DGenericOpcode.rst510 The return value of (FMAXNUM 0.0, -0.0) could be either 0.0 or -0.0.
523 definition. This differs from FMAXNUM in the handling of signaling NaNs. If one
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp362 case ISD::FMAXNUM: in LegalizeOp()
854 case ISD::FMAXNUM: in Expand()
H A DSelectionDAGDumper.cpp190 case ISD::FMAXNUM: return "fmaxnum"; in getOperationName()
H A DLegalizeFloatTypes.cpp75 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break; in SoftenFloatResult()
1220 case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break; in ExpandFloatResult()
2282 case ISD::FMAXNUM: in PromoteFloatResult()
2648 case ISD::FMAXNUM: in SoftPromoteHalfResult()
H A DSelectionDAGBuilder.cpp3387 case SPNB_RETURNS_OTHER: Opc = ISD::FMAXNUM; break; in visitSelect()
3390 if (TLI.isOperationLegalOrCustom(ISD::FMAXNUM, VT)) in visitSelect()
3391 Opc = ISD::FMAXNUM; in visitSelect()
3395 Opc = TLI.isOperationLegalOrCustom(ISD::FMAXNUM, VT.getScalarType()) ? in visitSelect()
3396 ISD::FMAXNUM : ISD::FMAXIMUM; in visitSelect()
6393 setValue(&I, DAG.getNode(ISD::FMAXNUM, sdl, in visitIntrinsicCall()
8429 if (visitBinaryFloatCall(I, ISD::FMAXNUM)) in visitCall()
H A DSelectionDAG.cpp453 return ISD::FMAXNUM; in getVecReduceBaseOpcode()
4872 case ISD::FMAXNUM: { in isKnownNeverNaN()
6022 case ISD::FMAXNUM: in foldConstantFPMath()
10941 case ISD::FMAXNUM: { in isNeutralConstant()
10950 if (Opcode == ISD::FMAXNUM) in isNeutralConstant()
12139 case ISD::FMAXNUM: { in getNeutralElement()
12145 if (Opcode == ISD::FMAXNUM) in getNeutralElement()
H A DLegalizeDAG.cpp3223 case ISD::FMAXNUM: { in ExpandNode()
4032 case ISD::FMAXNUM: in ConvertNodeToLibcall()
4787 case ISD::FMAXNUM: in PromoteNode()
H A DLegalizeVectorTypes.cpp124 case ISD::FMAXNUM: in ScalarizeVectorResult()
1090 case ISD::FMAXNUM: case ISD::VP_FMAXNUM: in SplitVectorResult()
3950 case ISD::FMAXNUM: case ISD::VP_FMAXNUM: in WidenVectorResult()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp326 ISD::FMAXNUM}, in AMDGPUTargetLowering()
447 {ISD::FABS, ISD::FMINNUM, ISD::FMAXNUM, ISD::FADD, in AMDGPUTargetLowering()
567 case ISD::FMAXNUM: in fnegFoldsIntoOp()
3808 case ISD::FMAXNUM: in inverseMinMax()
3811 return ISD::FMAXNUM; in inverseMinMax()
3926 case ISD::FMAXNUM: in performFNegCombine()
H A DSIISelLowering.cpp457 setOperationAction({ISD::FMINNUM, ISD::FMAXNUM}, {MVT::f32, MVT::f64}, in SITargetLowering()
642 setOperationAction({ISD::FMAXNUM, ISD::FMINNUM}, MVT::f16, Custom); in SITargetLowering()
648 setOperationAction({ISD::FMINNUM, ISD::FMAXNUM}, in SITargetLowering()
690 setOperationAction({ISD::FMAXNUM, ISD::FMINNUM}, {MVT::v2f16, MVT::v4f16}, in SITargetLowering()
753 ISD::FMAXNUM, in SITargetLowering()
4758 case ISD::FMAXNUM: in LowerOperation()
6910 return DAG.getNode(ISD::FMAXNUM, DL, VT, Tmp, in LowerINTRINSIC_WO_CHAIN()
10146 case ISD::FMAXNUM: in isCanonicalized()
10456 if (SrcOpc == ISD::FMINNUM || SrcOpc == ISD::FMAXNUM) { in performFCanonicalizeCombine()
10474 case ISD::FMAXNUM: in minMaxOpcToMin3Max3Opc()
[all …]
H A DAMDGPUISelDAGToDAG.cpp169 case ISD::FMAXNUM: in fp16SrcZerosHighBits()
/openbsd-src/gnu/llvm/llvm/include/llvm/Target/
H A DGenericOpcodes.td755 // FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two
778 // FMINNUM/FMAXNUM in the handling of signaling NaNs. If one input is a
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1638 ISD::FMINNUM, ISD::FMAXNUM, ISD::FSINCOS, in HexagonTargetLowering()
1761 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); in HexagonTargetLowering()
1810 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); in HexagonTargetLowering()
H A DHexagonISelLoweringHVX.cpp131 setOperationAction(ISD::FMAXNUM, T, Legal); in initializeHVXLowering()
168 setOperationAction(ISD::FMAXNUM, P, Custom); in initializeHVXLowering()
3169 case ISD::FMAXNUM: in LowerHvxOperation()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp313 ISD::FMINNUM, ISD::FMAXNUM, ISD::LRINT, in RISCVTargetLowering()
343 ISD::FMINNUM, ISD::FMAXNUM, ISD::FADD, in RISCVTargetLowering()
717 setOperationAction({ISD::FMINNUM, ISD::FMAXNUM}, VT, Legal); in RISCVTargetLowering()
954 ISD::FMA, ISD::FMINNUM, ISD::FMAXNUM}, in RISCVTargetLowering()
1013 setTargetDAGCombine({ISD::FADD, ISD::FMAXNUM, ISD::FMINNUM}); in RISCVTargetLowering()
4230 case ISD::FMAXNUM: in LowerOperation()
8185 case ISD::FMAXNUM: in combineBinOpToReduce()
10221 case ISD::FMAXNUM: in PerformDAGCombine()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp801 ISD::FMINNUM, ISD::FMAXNUM, in initActions()
/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp559 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); in SystemZTargetLowering()
564 setOperationAction(ISD::FMAXNUM, MVT::v2f64, Legal); in SystemZTargetLowering()
569 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); in SystemZTargetLowering()
574 setOperationAction(ISD::FMAXNUM, MVT::v4f32, Legal); in SystemZTargetLowering()
579 setOperationAction(ISD::FMAXNUM, MVT::f128, Legal); in SystemZTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp355 setOperationAction(ISD::FMAXNUM, VT, Legal); in addMVEVectorTypes()
793 setOperationAction(ISD::FMAXNUM, MVT::f16, Legal); in ARMTargetLowering()
1498 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); in ARMTargetLowering()
1501 setOperationAction(ISD::FMAXNUM, MVT::v2f32, Legal); in ARMTargetLowering()
1503 setOperationAction(ISD::FMAXNUM, MVT::v4f32, Legal); in ARMTargetLowering()
1514 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); in ARMTargetLowering()
1554 setOperationAction(ISD::FMAXNUM, MVT::v4f16, Legal); in ARMTargetLowering()
1556 setOperationAction(ISD::FMAXNUM, MVT::v8f16, Legal); in ARMTargetLowering()
4176 ? ISD::FMINNUM : ISD::FMAXNUM; in LowerINTRINSIC_WO_CHAIN()
10220 case ISD::VECREDUCE_FMAX: BaseOpcode = ISD::FMAXNUM; break; in LowerVecReduce()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp669 ISD::FTRUNC, ISD::FMINNUM, ISD::FMAXNUM, in AArch64TargetLowering()
735 ISD::FROUNDEVEN, ISD::FMINNUM, ISD::FMAXNUM, in AArch64TargetLowering()
1027 ISD::FTRUNC, ISD::FMINNUM, ISD::FMAXNUM, in AArch64TargetLowering()
1375 setOperationAction(ISD::FMAXNUM, VT, Custom); in AArch64TargetLowering()
1623 {ISD::FMINIMUM, ISD::FMAXIMUM, ISD::FMINNUM, ISD::FMAXNUM, in addTypeForNEON()
1753 setOperationAction(ISD::FMAXNUM, VT, Custom); in addTypeForStreamingSVE()
1871 setOperationAction(ISD::FMAXNUM, VT, Custom); in addTypeForFixedLengthSVE()
6043 case ISD::FMAXNUM: in LowerOperation()
18072 return DAG.getNode(ISD::FMAXNUM, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVEISelLowering.cpp259 setOperationAction({ISD::FMAXNUM, ISD::FMINNUM}, VT, Legal); in initSPUActions()

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