| /openbsd-src/usr.bin/awk/ |
| H A D | awk.h | 154 #define FCOS 10 macro
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| H A D | lex.c | 57 { "cos", FCOS, BLTIN },
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| H A D | run.c | 2094 case FCOS: in bltin()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 73 DAG_FUNCTION(cos, 1, 1, experimental_constrained_cos, FCOS)
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 915 FCOS, enumerator
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| H A D | BasicTTIImpl.h | 1774 ISD = ISD::FCOS; in getTypeBasedIntrinsicInstrCost()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 95 setOperationAction({ISD::FCOS, ISD::FSIN}, MVT::f32, Custom); in R600TargetLowering()
408 case ISD::FCOS: in LowerOperation()
700 case ISD::FCOS: in LowerTrig()
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| H A D | SIISelLowering.cpp | 474 setOperationAction({ISD::FSIN, ISD::FCOS, ISD::FDIV}, MVT::f32, Custom); in SITargetLowering()
518 {ISD::FP_ROUND, ISD::FCOS, ISD::FSIN, ISD::FROUND, ISD::FPTRUNC_ROUND}, in SITargetLowering()
4701 case ISD::FCOS: in LowerOperation()
9361 case ISD::FCOS: in LowerTrig()
10141 case ISD::FCOS: in isCanonicalized()
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| H A D | AMDGPUISelDAGToDAG.cpp | 154 case ISD::FCOS: in fp16SrcZerosHighBits()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 204 case ISD::FCOS: return "fcos"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 83 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break; in SoftenFloatResult()
1228 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break; in ExpandFloatResult()
2260 case ISD::FCOS: in PromoteFloatResult()
2625 case ISD::FCOS: in SoftPromoteHalfResult()
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| H A D | LegalizeDAG.cpp | 2234 ? ISD::FCOS : ISD::FSIN; in useSinCos()
3229 case ISD::FCOS: { in ExpandNode()
3238 if (Node->getOpcode() == ISD::FCOS) in ExpandNode()
4055 case ISD::FCOS: in ConvertNodeToLibcall()
4880 case ISD::FCOS: in PromoteNode()
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| H A D | LegalizeVectorOps.cpp | 370 case ISD::FCOS: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 88 case ISD::FCOS: in ScalarizeVectorResult()
1032 case ISD::FCOS: in SplitVectorResult()
4078 case ISD::FCOS: in WidenVectorResult()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ScheduleAtom.td | 928 def : InstRW<[AtomWrite01_174], (instrs FSINCOS, FSIN, FCOS)>;
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| H A D | X86InstrFPStack.td | 769 def FCOS : I<0xD9, MRM_FF, (outs), (ins), "fcos", []>;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1765 setOperationAction(ISD::FCOS , MVT::f128, Expand); in SparcTargetLowering()
1770 setOperationAction(ISD::FCOS , MVT::f64, Expand); in SparcTargetLowering()
1775 setOperationAction(ISD::FCOS , MVT::f32, Expand); in SparcTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 119 ISD::NodeType FPOpToExpand[] = {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in CSKYTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 146 setOperationAction(ISD::FCOS, MVT::f32, Expand); in LoongArchTargetLowering()
162 setOperationAction(ISD::FCOS, MVT::f64, Expand); in LoongArchTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1589 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in HexagonTargetLowering()
1635 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 384 setOperationAction(ISD::FCOS , MVT::f64, Expand); in PPCTargetLowering()
389 setOperationAction(ISD::FCOS , MVT::f32, Expand); in PPCTargetLowering()
398 setOperationAction(ISD::FCOS , MVT::f64, Custom); in PPCTargetLowering()
404 setOperationAction(ISD::FCOS , MVT::f32, Custom); in PPCTargetLowering()
846 setOperationAction(ISD::FCOS, VT, Expand); in PPCTargetLowering()
1173 setOperationAction(ISD::FCOS, MVT::f128, Expand); in PPCTargetLowering()
11302 case ISD::FCOS: return lowerCos(Op, DAG); in LowerOperation()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 421 setOperationAction(ISD::FCOS, MVT::f32, Expand); in MipsTargetLowering()
422 setOperationAction(ISD::FCOS, MVT::f64, Expand); in MipsTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 124 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 367 setOperationAction(ISD::FCOS, VT, Expand); in addMVEVectorTypes()
876 setOperationAction(ISD::FCOS, MVT::v2f64, Expand); in ARMTargetLowering()
897 setOperationAction(ISD::FCOS, MVT::v4f32, Expand); in ARMTargetLowering()
913 setOperationAction(ISD::FCOS, MVT::v2f32, Expand); in ARMTargetLowering()
1046 setOperationAction(ISD::FCOS, MVT::f64, Expand); in ARMTargetLowering()
1440 setOperationAction(ISD::FCOS, MVT::f32, Expand); in ARMTargetLowering()
1441 setOperationAction(ISD::FCOS, MVT::f64, Expand); in ARMTargetLowering()
1523 setOperationAction(ISD::FCOS, MVT::f16, Promote); in ARMTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 250 setOperationAction(ISD::FCOS, VT, Expand); in initSPUActions()
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