| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 94 ExtractElementInst *Ext1,
96 bool isExtractExtractCheap(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
100 void foldExtExtCmp(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
102 void foldExtExtBinop(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
337 ExtractElementInst *Ext0, ExtractElementInst *Ext1, in getShuffleExtract() argument
340 auto *Index1C = dyn_cast<ConstantInt>(Ext1->getIndexOperand()); in getShuffleExtract()
352 assert(VecTy == Ext1->getVectorOperand()->getType() && "Need matching types"); in getShuffleExtract()
356 TTI.getVectorInstrCost(*Ext1, VecTy, CostKind, Index1); in getShuffleExtract()
368 return Ext1; in getShuffleExtract()
373 return Ext1; in getShuffleExtract()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/BinaryFormat/ |
| H A D | MsgPack.def | 94 HANDLE_MP_FIX_LEN(0x01, Ext1)
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| /openbsd-src/gnu/llvm/llvm/lib/BinaryFormat/ |
| H A D | MsgPackWriter.cpp | 179 case FixLen::Ext1: in writeExt()
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| H A D | MsgPackReader.cpp | 121 return createExt(Obj, FixLen::Ext1); in read()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9317 SDValue Ext1 = Ext.getValue(1); in LowerVectorExtend() local
9321 Ext1 = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext1); in LowerVectorExtend()
9324 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ToVT, Ext, Ext1); in LowerVectorExtend()
10248 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
10254 SDValue Res0 = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10260 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
10262 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
13210 SDValue Ext1 = Mul.getOperand(1); in PerformVQDMULHCombine() local
13212 Ext1.getOpcode() != ISD::SIGN_EXTEND) in PerformVQDMULHCombine()
13217 if (Ext1.getOperand(0).getValueType() != VecVT || in PerformVQDMULHCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13801 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
13807 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
13809 !areExtDoubled(cast<Instruction>(Ext1)) || in areExtractExts()
13939 auto Ext1 = cast<Instruction>(I->getOperand(0)); in shouldSinkOperands() local
13941 if (areExtractShuffleVectors(Ext1->getOperand(0), Ext2->getOperand(0))) { in shouldSinkOperands()
13942 Ops.push_back(&Ext1->getOperandUse(0)); in shouldSinkOperands()
15220 SDValue Ext1 = Op1.getOperand(0); in performUADDVCombine() local
15222 Ext1.getOpcode() != ISD::EXTRACT_SUBVECTOR || in performUADDVCombine()
15223 Ext0.getOperand(0) != Ext1.getOperand(0)) in performUADDVCombine()
15231 Ext1.getConstantOperandVal(1) != VT.getVectorNumElements()) && in performUADDVCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2777 auto Ext1 = B.buildFPExt(S32, Src1, Flags); in legalizeFPow() local
2780 .addUse(Ext1.getReg(0)) in legalizeFPow()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 14568 SDValue Ext1 = FirstInput.getOperand(0); in DAGCombineBuildVector() local
14570 if(Ext1.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in DAGCombineBuildVector()
14574 ConstantSDNode *Ext1Op = dyn_cast<ConstantSDNode>(Ext1.getOperand(1)); in DAGCombineBuildVector()
14578 if (Ext1.getOperand(0).getValueType() != MVT::v4i32 || in DAGCombineBuildVector()
14579 Ext1.getOperand(0) != Ext2.getOperand(0)) in DAGCombineBuildVector()
14592 SDValue SrcVec = Ext1.getOperand(0); in DAGCombineBuildVector()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 11768 SDValue Ext1 = DAG.getNode(Opcode, DL, VT, Op1); in tryToFoldExtendSelectLoad() local
11770 return DAG.getSelect(DL, VT, N0->getOperand(0), Ext1, Ext2); in tryToFoldExtendSelectLoad()
12391 SDValue Ext1 = DAG.getNode(ExtOpcode, DL, VT, N01); in foldSextSetcc() local
12392 return DAG.getSetCC(DL, VT, Ext0, Ext1, CC); in foldSextSetcc()
20485 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op1, Index); in scalarizeExtractedBinop() local
20486 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1); in scalarizeExtractedBinop()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 44802 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP() local
44804 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2)); in scalarizeExtEltFP()
44826 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, in scalarizeExtEltFP() local
44830 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
55896 SDValue Ext1 = extractSubVector(InVec.getOperand(1), 0, DAG, DL, 128); in combineEXTRACT_SUBVECTOR() local
55898 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineEXTRACT_SUBVECTOR()
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