| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 93 ExtractElementInst *getShuffleExtract(ExtractElementInst *Ext0,
96 bool isExtractExtractCheap(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
100 void foldExtExtCmp(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
102 void foldExtExtBinop(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
337 ExtractElementInst *Ext0, ExtractElementInst *Ext1, in getShuffleExtract() argument
339 auto *Index0C = dyn_cast<ConstantInt>(Ext0->getIndexOperand()); in getShuffleExtract()
350 Type *VecTy = Ext0->getVectorOperand()->getType(); in getShuffleExtract()
354 TTI.getVectorInstrCost(*Ext0, VecTy, CostKind, Index0); in getShuffleExtract()
366 return Ext0; in getShuffleExtract()
375 return Ext0; in getShuffleExtract()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 10246 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
10254 SDValue Res0 = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10258 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
10262 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
13209 SDValue Ext0 = Mul.getOperand(0); in PerformVQDMULHCombine() local
13211 if (Ext0.getOpcode() != ISD::SIGN_EXTEND || in PerformVQDMULHCombine()
13214 EVT VecVT = Ext0.getOperand(0).getValueType(); in PerformVQDMULHCombine()
13232 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext0.getOperand(0)); in PerformVQDMULHCombine()
13249 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext0.getOperand(0), in PerformVQDMULHCombine()
17064 SDValue Ext0 = in PerformVECREDUCE_ADDCombine() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2776 auto Ext0 = B.buildFPExt(S32, Log, Flags); in legalizeFPow() local
2779 .addUse(Ext0.getReg(0)) in legalizeFPow()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 15219 SDValue Ext0 = Op0.getOperand(0); in performUADDVCombine() local
15221 if (Ext0.getOpcode() != ISD::EXTRACT_SUBVECTOR || in performUADDVCombine()
15223 Ext0.getOperand(0) != Ext1.getOperand(0)) in performUADDVCombine()
15227 if (Ext0.getOperand(0).getValueType().getVectorNumElements() != in performUADDVCombine()
15230 if ((Ext0.getConstantOperandVal(1) != 0 && in performUADDVCombine()
15233 Ext0.getConstantOperandVal(1) != VT.getVectorNumElements())) in performUADDVCombine()
15237 return DAG.getNode(Opcode, SDLoc(A), VT, Ext0.getOperand(0)); in performUADDVCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 42542 SDValue Ext0 = in SimplifyDemandedVectorEltsForTargetNode() local
42545 TLO.DAG.getNode(Opc, DL, Ext0.getValueType(), Ext0, Op.getOperand(1)); in SimplifyDemandedVectorEltsForTargetNode()
44800 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP() local
44804 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2)); in scalarizeExtEltFP()
44823 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in scalarizeExtEltFP() local
44830 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
55895 SDValue Ext0 = extractSubVector(InVec.getOperand(0), 0, DAG, DL, 128); in combineEXTRACT_SUBVECTOR() local
55898 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineEXTRACT_SUBVECTOR()
55911 SDValue Ext0 = in combineEXTRACT_SUBVECTOR() local
55913 return DAG.getNode(InOpcode, DL, VT, Ext0); in combineEXTRACT_SUBVECTOR()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12390 SDValue Ext0 = DAG.getNode(ExtOpcode, DL, VT, N00); in foldSextSetcc() local
12392 return DAG.getSetCC(DL, VT, Ext0, Ext1, CC); in foldSextSetcc()
20484 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op0, Index); in scalarizeExtractedBinop() local
20486 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1); in scalarizeExtractedBinop()
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